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Mon, 1 Oct 2018 13:57:13 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1538395033; bh=SEwONAKUPLnQvPdqyDN0j2bLhYtpzo2X4JReEAVA59g=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=PPeLhYLyxkjHLgys7VvFdUj1hRUmhndO68jRRh5o2JAxSgD2ybAOt4Epjwc4r6L5f 9XBERQTP4KY7I99Puxt7gO5da+lSk5SHBtWZ9jbhbJXpsWVXDSV9Vn/tOzUTe1WluM Ej+PlyEfTK0Qg8aYiqugcD74X5HIPgqjdUBiH04g= From: Luc Michel To: qemu-devel@nongnu.org Date: Mon, 1 Oct 2018 13:57:04 +0200 Message-Id: <20181001115704.701-16-luc.michel@greensocs.com> X-Mailer: git-send-email 2.19.0 In-Reply-To: <20181001115704.701-1-luc.michel@greensocs.com> References: <20181001115704.701-1-luc.michel@greensocs.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 193.104.36.180 Subject: [Qemu-devel] [PATCH v2 15/15] arm/xlnx-zynqmp: put APUs and RPUs in separate GDB groups X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , alistair@alistair23.me, mark.burton@greensocs.com, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , saipava@xilinx.com, edgari@xilinx.com, qemu-arm@nongnu.org, Luc Michel Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Create two separate QOM containers for APUs and RPUs to indicate to the GDB stub that those CPUs should be put in different processes. Signed-off-by: Luc Michel --- hw/arm/xlnx-zynqmp.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index c195040350..5e92adbc71 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -22,10 +22,11 @@ #include "hw/arm/xlnx-zynqmp.h" #include "hw/intc/arm_gic_common.h" #include "exec/address-spaces.h" #include "sysemu/kvm.h" #include "kvm_arm.h" +#include "exec/gdbstub.h" #define GIC_NUM_SPI_INTR 160 #define ARM_PHYS_TIMER_PPI 30 #define ARM_VIRT_TIMER_PPI 27 @@ -175,17 +176,18 @@ static void xlnx_zynqmp_create_rpu(XlnxZynqMPState *s, const char *boot_cpu, Error **errp) { Error *err = NULL; int i; int num_rpus = MIN(smp_cpus - XLNX_ZYNQMP_NUM_APU_CPUS, XLNX_ZYNQMP_NUM_RPU_CPUS); + Object *rpu_group = gdb_cpu_group_container_get(OBJECT(s)); for (i = 0; i < num_rpus; i++) { char *name; object_initialize(&s->rpu_cpu[i], sizeof(s->rpu_cpu[i]), "cortex-r5f-" TYPE_ARM_CPU); - object_property_add_child(OBJECT(s), "rpu-cpu[*]", + object_property_add_child(rpu_group, "rpu-cpu[*]", OBJECT(&s->rpu_cpu[i]), &error_abort); name = object_get_canonical_path_component(OBJECT(&s->rpu_cpu[i])); if (strcmp(name, boot_cpu)) { /* Secondary CPUs start in PSCI powered-down state */ @@ -210,13 +212,14 @@ static void xlnx_zynqmp_create_rpu(XlnxZynqMPState *s, const char *boot_cpu, static void xlnx_zynqmp_init(Object *obj) { XlnxZynqMPState *s = XLNX_ZYNQMP(obj); int i; int num_apus = MIN(smp_cpus, XLNX_ZYNQMP_NUM_APU_CPUS); + Object *apu_group = gdb_cpu_group_container_get(obj); for (i = 0; i < num_apus; i++) { - object_initialize_child(obj, "apu-cpu[*]", &s->apu_cpu[i], + object_initialize_child(apu_group, "apu-cpu[*]", &s->apu_cpu[i], sizeof(s->apu_cpu[i]), "cortex-a53-" TYPE_ARM_CPU, &error_abort, NULL); } sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic),