From patchwork Thu Oct 18 13:04:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 10647149 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 748FD14E2 for ; Thu, 18 Oct 2018 13:08:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 64C7B28944 for ; Thu, 18 Oct 2018 13:08:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6157128901; Thu, 18 Oct 2018 13:08:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 667E5289E2 for ; Thu, 18 Oct 2018 13:07:58 +0000 (UTC) Received: from localhost ([::1]:42335 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gD81t-0000le-AD for patchwork-qemu-devel@patchwork.kernel.org; Thu, 18 Oct 2018 09:07:57 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39186) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gD7yx-0006oa-Np for qemu-devel@nongnu.org; Thu, 18 Oct 2018 09:04:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gD7yw-0003C5-AX for qemu-devel@nongnu.org; Thu, 18 Oct 2018 09:04:55 -0400 Received: from mx1.redhat.com ([209.132.183.28]:58898) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gD7yw-0003A2-0w for qemu-devel@nongnu.org; Thu, 18 Oct 2018 09:04:54 -0400 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 277E688E52; Thu, 18 Oct 2018 13:04:53 +0000 (UTC) Received: from x1w.redhat.com (unknown [10.40.205.158]) by smtp.corp.redhat.com (Postfix) with ESMTPS id E09B5105704B; Thu, 18 Oct 2018 13:04:49 +0000 (UTC) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: Peng Hao Date: Thu, 18 Oct 2018 15:04:32 +0200 Message-Id: <20181018130434.23237-3-philmd@redhat.com> In-Reply-To: <20181018130434.23237-1-philmd@redhat.com> References: <20181018130434.23237-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Thu, 18 Oct 2018 13:04:53 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 2/4] hw/misc/pvpanic: Cosmetic renaming X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= , qemu-devel@nongnu.org, Wen Congyang , Hu Tao Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP To ease the MMIO device addition in the next patch, rename: - ISA_PVPANIC_DEVICE -> PVPANIC (this just returns a generic Object), - ISADevice parent_obj -> isadev, - MemoryRegion io -> mr. Signed-off-by: Philippe Mathieu-Daudé --- hw/misc/pvpanic.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c index 9d8961ba0c..4f552e1533 100644 --- a/hw/misc/pvpanic.c +++ b/hw/misc/pvpanic.c @@ -25,7 +25,7 @@ /* The pv event value */ #define PVPANIC_PANICKED (1 << PVPANIC_F_PANICKED) -#define ISA_PVPANIC_DEVICE(obj) \ +#define PVPANIC(obj) \ OBJECT_CHECK(PVPanicState, (obj), TYPE_PVPANIC) static void handle_event(int event) @@ -46,9 +46,11 @@ static void handle_event(int event) #include "hw/isa/isa.h" typedef struct PVPanicState { - ISADevice parent_obj; + /*< private >*/ + ISADevice isadev; - MemoryRegion io; + /*< public >*/ + MemoryRegion mr; uint16_t ioport; } PVPanicState; @@ -75,15 +77,15 @@ static const MemoryRegionOps pvpanic_ops = { static void pvpanic_isa_initfn(Object *obj) { - PVPanicState *s = ISA_PVPANIC_DEVICE(obj); + PVPanicState *s = PVPANIC(obj); - memory_region_init_io(&s->io, OBJECT(s), &pvpanic_ops, s, "pvpanic", 1); + memory_region_init_io(&s->mr, OBJECT(s), &pvpanic_ops, s, "pvpanic", 1); } static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp) { ISADevice *d = ISA_DEVICE(dev); - PVPanicState *s = ISA_PVPANIC_DEVICE(dev); + PVPanicState *s = PVPANIC(dev); FWCfgState *fw_cfg = fw_cfg_find(); uint16_t *pvpanic_port; @@ -96,7 +98,7 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp) fw_cfg_add_file(fw_cfg, "etc/pvpanic-port", pvpanic_port, sizeof(*pvpanic_port)); - isa_register_ioport(d, &s->io, s->ioport); + isa_register_ioport(d, &s->mr, s->ioport); } static Property pvpanic_isa_properties[] = {