diff mbox series

[RFC,v4,32/71] exec: use cpu_reset_interrupt

Message ID 20181025144644.15464-32-cota@braap.org (mailing list archive)
State New, archived
Headers show
Series [RFC,v4,01/71] cpu: convert queued work to a QSIMPLEQ | expand

Commit Message

Emilio Cota Oct. 25, 2018, 2:46 p.m. UTC
Signed-off-by: Emilio G. Cota <cota@braap.org>
---
 exec.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Richard Henderson Oct. 26, 2018, 3:07 p.m. UTC | #1
On 10/25/18 3:46 PM, Emilio G. Cota wrote:
> Signed-off-by: Emilio G. Cota <cota@braap.org>
> ---
>  exec.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~
Alex Bennée Oct. 31, 2018, 4:33 p.m. UTC | #2
Emilio G. Cota <cota@braap.org> writes:

> Signed-off-by: Emilio G. Cota <cota@braap.org>
> ---
>  exec.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/exec.c b/exec.c
> index 4fd831ef06..cd171adb93 100644
> --- a/exec.c
> +++ b/exec.c
> @@ -776,7 +776,7 @@ static int cpu_common_post_load(void *opaque, int version_id)
>
>      /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
>         version_id is increased. */
> -    cpu->interrupt_request &= ~0x01;
> +    cpu_reset_interrupt(cpu, 1);

I mean this does raise a question about why 0x1 doesn't have it's own
nice define (along with a description of what it means) but I guess that
is lost to the mists of time.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

>      tlb_flush(cpu);
>
>      /* loadvm has just updated the content of RAM, bypassing the


--
Alex Bennée
diff mbox series

Patch

diff --git a/exec.c b/exec.c
index 4fd831ef06..cd171adb93 100644
--- a/exec.c
+++ b/exec.c
@@ -776,7 +776,7 @@  static int cpu_common_post_load(void *opaque, int version_id)
 
     /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
        version_id is increased. */
-    cpu->interrupt_request &= ~0x01;
+    cpu_reset_interrupt(cpu, 1);
     tlb_flush(cpu);
 
     /* loadvm has just updated the content of RAM, bypassing the