From patchwork Thu Oct 25 17:20:34 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Emilio Cota X-Patchwork-Id: 10656285 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5E3F913A9 for ; Thu, 25 Oct 2018 17:46:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4DE252C27C for ; Thu, 25 Oct 2018 17:46:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 423022C298; Thu, 25 Oct 2018 17:46:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B66632C27C for ; Thu, 25 Oct 2018 17:46:07 +0000 (UTC) Received: from localhost ([::1]:56140 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFjhv-0005cv-26 for patchwork-qemu-devel@patchwork.kernel.org; Thu, 25 Oct 2018 13:46:07 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40359) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFjKj-0006hv-7W for qemu-devel@nongnu.org; Thu, 25 Oct 2018 13:22:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFjKP-0000CE-NU for qemu-devel@nongnu.org; Thu, 25 Oct 2018 13:21:50 -0400 Received: from out3-smtp.messagingengine.com ([66.111.4.27]:37021) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gFjKP-00005r-Gv for qemu-devel@nongnu.org; Thu, 25 Oct 2018 13:21:49 -0400 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.nyi.internal (Postfix) with ESMTP id 10C94221D2; Thu, 25 Oct 2018 13:21:13 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute4.internal (MEProxy); Thu, 25 Oct 2018 13:21:13 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=braap.org; h= from:to:cc:subject:date:message-id:in-reply-to:references; s= mesmtp; bh=watJ1az68IcwbN8Dd3xba8M1ow7onC1SkxnvCoRBDNQ=; b=ZJmBJ AWhcxlra7PwkDODMnOItxPOqn2K5ob3/C6XWvBAXxrltsHyN/eeAT4QUYVCKLMBJ ph98rFMLJraKRxo6jUf+ZnI5qvF1YtHcKr62IyHKVgP1ZFNZRxGNqCYyG0PgerY9 yLUgTCnXilkUNbrPDikqnWSVzl8kZoK+yr8mw8= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-proxy:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm1; bh=watJ1az68IcwbN8Dd3xba8M1ow7on C1SkxnvCoRBDNQ=; b=jTeny/uoMBs3UleOkqpH4PQa5bsZF7RczjEdljpopxzah ZymobSTNymE5asPmJJpMkXMBGyFgux4VgbWXtWCJkdCcn3/tmzWKTei/yp6T9kKw j+unoe9laKZ34fQSUI2F9+/AE+vXYYh1L7POtmuSNw7dQpBJArtRUAQXsnO10dIr b3ov/K91/01+UwOfxJVk0SAmFMH/cqxtB8Y01QMvUFdblPAEPY8vnjCCRp5WurC5 NksLWCTlhmImQP+CbC3TmaObpGDti3h4C3Q/sOuxDURkD3+krgZ1SOzcimURnEay 38rOAYQnfilLGXTvPTMyxZprkoy/L212Lda8mtzxg== X-ME-Sender: X-ME-Proxy: Received: from localhost (flamenco.cs.columbia.edu [128.59.20.216]) by mail.messagingengine.com (Postfix) with ESMTPA id 77CFBE4074; Thu, 25 Oct 2018 13:21:12 -0400 (EDT) From: "Emilio G. Cota" To: qemu-devel@nongnu.org Date: Thu, 25 Oct 2018 13:20:34 -0400 Message-Id: <20181025172057.20414-26-cota@braap.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181025172057.20414-1-cota@braap.org> References: <20181025172057.20414-1-cota@braap.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 66.111.4.27 Subject: [Qemu-devel] [RFC 25/48] target/arm: prepare for 2-pass translation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Llu=C3=ADs?= =?utf-8?q?_Vilanova?= , Pavel Dovgalyuk , Stefan Hajnoczi Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Emilio G. Cota --- target/arm/translate-a64.c | 8 ++++++-- target/arm/translate.c | 25 +++++++++++++++++++++---- 2 files changed, 27 insertions(+), 6 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 8b1e20dd59..dab5f6efd3 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -13783,11 +13783,13 @@ static void disas_data_proc_simd_fp(DisasContext *s, uint32_t insn) } /* C3.1 A64 instruction index by encoding */ -static void disas_a64_insn(CPUARMState *env, DisasContext *s) +static void disas_a64_insn(CPUARMState *env, DisasContext *s, + struct qemu_plugin_insn *plugin_insn) { uint32_t insn; insn = arm_ldl_code(env, s->pc, s->sctlr_b); + qemu_plugin_insn_append(plugin_insn, &insn, sizeof(insn)); s->insn = insn; s->pc += 4; @@ -13959,7 +13961,7 @@ static void aarch64_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu, default_exception_el(dc)); dc->base.is_jmp = DISAS_NORETURN; } else { - disas_a64_insn(env, dc); + disas_a64_insn(env, dc, plugin_insn); } dc->base.pc_next = dc->pc; @@ -14058,4 +14060,6 @@ const TranslatorOps aarch64_translator_ops = { .translate_insn = aarch64_tr_translate_insn, .tb_stop = aarch64_tr_tb_stop, .disas_log = aarch64_tr_disas_log, + .ctx_base_offset = offsetof(DisasContext, base), + .ctx_size = sizeof(DisasContext), }; diff --git a/target/arm/translate.c b/target/arm/translate.c index 2fd32a2684..015153a260 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -10198,7 +10198,8 @@ gen_thumb2_data_op(DisasContext *s, int op, int conds, uint32_t shifter_out, } /* Translate a 32-bit thumb instruction. */ -static void disas_thumb2_insn(DisasContext *s, uint32_t insn) +static void disas_thumb2_insn(DisasContext *s, uint32_t insn, + struct qemu_plugin_insn *plugin_insn) { uint32_t imm, shift, offset; uint32_t rd, rn, rm, rs; @@ -11736,7 +11737,8 @@ illegal_op: default_exception_el(s)); } -static void disas_thumb_insn(DisasContext *s, uint32_t insn) +static void disas_thumb_insn(DisasContext *s, uint32_t insn, + struct qemu_plugin_insn *plugin_insn) { uint32_t val, op, rm, rn, rd, shift, cond; int32_t offset; @@ -12800,6 +12802,7 @@ static void arm_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu, insn = arm_ldl_code(env, dc->pc, dc->sctlr_b); dc->insn = insn; + qemu_plugin_insn_append(plugin_insn, &insn, sizeof(insn)); dc->pc += 4; disas_arm_insn(dc, insn); @@ -12870,11 +12873,21 @@ static void thumb_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu, insn = arm_lduw_code(env, dc->pc, dc->sctlr_b); is_16bit = thumb_insn_is_16bit(dc, insn); dc->pc += 2; + if (plugin_insn) { + uint16_t insn16 = insn; + + qemu_plugin_insn_append(plugin_insn, &insn16, sizeof(insn16)); + } if (!is_16bit) { uint32_t insn2 = arm_lduw_code(env, dc->pc, dc->sctlr_b); insn = insn << 16 | insn2; dc->pc += 2; + if (plugin_insn) { + uint16_t insn16 = insn2; + + qemu_plugin_insn_append(plugin_insn, &insn16, sizeof(insn16)); + } } dc->insn = insn; @@ -12887,9 +12900,9 @@ static void thumb_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu, } if (is_16bit) { - disas_thumb_insn(dc, insn); + disas_thumb_insn(dc, insn, plugin_insn); } else { - disas_thumb2_insn(dc, insn); + disas_thumb2_insn(dc, insn, plugin_insn); } /* Advance the Thumb condexec condition. */ @@ -13064,6 +13077,8 @@ static const TranslatorOps arm_translator_ops = { .translate_insn = arm_tr_translate_insn, .tb_stop = arm_tr_tb_stop, .disas_log = arm_tr_disas_log, + .ctx_base_offset = offsetof(DisasContext, base), + .ctx_size = sizeof(DisasContext), }; static const TranslatorOps thumb_translator_ops = { @@ -13074,6 +13089,8 @@ static const TranslatorOps thumb_translator_ops = { .translate_insn = thumb_tr_translate_insn, .tb_stop = arm_tr_tb_stop, .disas_log = arm_tr_disas_log, + .ctx_base_offset = offsetof(DisasContext, base), + .ctx_size = sizeof(DisasContext), }; /* generate intermediate code for basic block 'tb'. */