From patchwork Fri Nov 23 14:45:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 10696029 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 71E4D16B1 for ; Fri, 23 Nov 2018 15:00:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 617052C34F for ; Fri, 23 Nov 2018 15:00:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 55C202C3AF; Fri, 23 Nov 2018 15:00:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C879F2C34F for ; Fri, 23 Nov 2018 15:00:27 +0000 (UTC) Received: from localhost ([::1]:52830 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gQCwV-00069o-1p for patchwork-qemu-devel@patchwork.kernel.org; Fri, 23 Nov 2018 10:00:27 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44220) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gQCj4-0000Hc-J9 for qemu-devel@nongnu.org; Fri, 23 Nov 2018 09:46:38 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gQCj3-0003jY-Dy for qemu-devel@nongnu.org; Fri, 23 Nov 2018 09:46:34 -0500 Received: from mail-wm1-x343.google.com ([2a00:1450:4864:20::343]:50879) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gQCj1-0003fW-Od for qemu-devel@nongnu.org; Fri, 23 Nov 2018 09:46:32 -0500 Received: by mail-wm1-x343.google.com with SMTP id 125so12200375wmh.0 for ; Fri, 23 Nov 2018 06:46:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=YsfD7bGBwOuFfa/KmNIqjSeHrUGXixpyPRKCYYVgwws=; b=VxBJdg0h0LcJdWxFQ8PwIcT2N1FLWAXxjqUiM/twpeTrWiQF4kO2wEu9rp5b/1Ujq0 fg9JKXmc/HP0hRKR9rx7eEZq5vD0mludMZcprfbH0xIvi9xumfMrg9fRc4GdIJZWCVV3 bgkrV+uK4tHYiNaqwaNyXaaxrF3GT9LsK2sRA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=YsfD7bGBwOuFfa/KmNIqjSeHrUGXixpyPRKCYYVgwws=; b=W4iZZ6FgADE8cqPGH4NovONVv5bFe4IoFJ+h4AhJPx6CtH0D6npsd8G8vzZgW2Usdh UuBqFNy6U/TZIEKrs2r+6dBImXBG5+uG2IyAHIlpIHb/ya9TKXiVrgdfaOPc3ZXN8Fmi QVSxFkCEOyad0bMjtWlhNecfGxvvOKaymhP80colgfVb593pKsVWjgjNMd0sg4pcRcD9 ACvYYqzEB0Zrf3kpr1gh3VF++ynjAhAw3F72QxX72SxiZLrMAGROAufCp7iYR9o1lYVu sXg05gwIKeF1MchQK6X9Fr4L3adf26xVHqFh0vj2SvIRxx9EC4sFpzegGCJGjykdsJIL bivA== X-Gm-Message-State: AA+aEWY0iHBt5DNyQv5CygM+HyPZU/yCMM81PFHXasTMzL0pPAodJPG9 yje5C6QIrjl2RRSoIkqr0L9F5SNfooXq5g== X-Google-Smtp-Source: AJdET5eUGKBGehv0Rygg3Pyvnu8mzzGQImNkYX0Nsx56U7sFAYys026l7ytS0AuLoNtXNqSP8Hzpsw== X-Received: by 2002:a1c:aecb:: with SMTP id x194mr13021798wme.96.1542984390174; Fri, 23 Nov 2018 06:46:30 -0800 (PST) Received: from cloudburst.twiddle.net ([195.77.246.50]) by smtp.gmail.com with ESMTPSA id p74sm10339630wmd.29.2018.11.23.06.46.29 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 23 Nov 2018 06:46:29 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 23 Nov 2018 15:45:52 +0100 Message-Id: <20181123144558.5048-32-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181123144558.5048-1-richard.henderson@linaro.org> References: <20181123144558.5048-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::343 Subject: [Qemu-devel] [PATCH for-4.0 v2 31/37] tcg/aarch64: Set TCG_TARGET_HAS_MEMORY_BSWAP to false X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alistair.Francis@wdc.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP This allows us to remove some code from the backend, allowing the generic code to emit any extra bswaps. Signed-off-by: Richard Henderson --- tcg/aarch64/tcg-target.h | 2 +- tcg/aarch64/tcg-target.inc.c | 51 +++++++----------------------------- 2 files changed, 10 insertions(+), 43 deletions(-) diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h index 0788f2eecb..7f55d50400 100644 --- a/tcg/aarch64/tcg-target.h +++ b/tcg/aarch64/tcg-target.h @@ -137,7 +137,7 @@ typedef enum { #define TCG_TARGET_HAS_mul_vec 1 #define TCG_TARGET_DEFAULT_MO (0) -#define TCG_TARGET_HAS_MEMORY_BSWAP 1 +#define TCG_TARGET_HAS_MEMORY_BSWAP 0 static inline void flush_icache_range(uintptr_t start, uintptr_t stop) { diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c index 8edea527f7..34f9347cdf 100644 --- a/tcg/aarch64/tcg-target.inc.c +++ b/tcg/aarch64/tcg-target.inc.c @@ -1485,8 +1485,6 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, TCGMemOp memop, TCGType ext, TCGReg data_r, TCGReg addr_r, TCGType otype, TCGReg off_r) { - const TCGMemOp bswap = memop & MO_BSWAP; - switch (memop & MO_SSIZE) { case MO_UB: tcg_out_ldst_r(s, I3312_LDRB, data_r, addr_r, otype, off_r); @@ -1497,43 +1495,22 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, TCGMemOp memop, TCGType ext, break; case MO_UW: tcg_out_ldst_r(s, I3312_LDRH, data_r, addr_r, otype, off_r); - if (bswap) { - tcg_out_rev16(s, data_r, data_r); - } break; case MO_SW: - if (bswap) { - tcg_out_ldst_r(s, I3312_LDRH, data_r, addr_r, otype, off_r); - tcg_out_rev16(s, data_r, data_r); - tcg_out_sxt(s, ext, MO_16, data_r, data_r); - } else { - tcg_out_ldst_r(s, (ext ? I3312_LDRSHX : I3312_LDRSHW), - data_r, addr_r, otype, off_r); - } + tcg_out_ldst_r(s, (ext ? I3312_LDRSHX : I3312_LDRSHW), + data_r, addr_r, otype, off_r); break; case MO_UL: tcg_out_ldst_r(s, I3312_LDRW, data_r, addr_r, otype, off_r); - if (bswap) { - tcg_out_rev32(s, data_r, data_r); - } break; case MO_SL: - if (bswap) { - tcg_out_ldst_r(s, I3312_LDRW, data_r, addr_r, otype, off_r); - tcg_out_rev32(s, data_r, data_r); - tcg_out_sxt(s, TCG_TYPE_I64, MO_32, data_r, data_r); - } else { - tcg_out_ldst_r(s, I3312_LDRSWX, data_r, addr_r, otype, off_r); - } + tcg_out_ldst_r(s, I3312_LDRSWX, data_r, addr_r, otype, off_r); break; case MO_Q: tcg_out_ldst_r(s, I3312_LDRX, data_r, addr_r, otype, off_r); - if (bswap) { - tcg_out_rev64(s, data_r, data_r); - } break; default: - tcg_abort(); + g_assert_not_reached(); } } @@ -1541,35 +1518,21 @@ static void tcg_out_qemu_st_direct(TCGContext *s, TCGMemOp memop, TCGReg data_r, TCGReg addr_r, TCGType otype, TCGReg off_r) { - const TCGMemOp bswap = memop & MO_BSWAP; - switch (memop & MO_SIZE) { case MO_8: tcg_out_ldst_r(s, I3312_STRB, data_r, addr_r, otype, off_r); break; case MO_16: - if (bswap && data_r != TCG_REG_XZR) { - tcg_out_rev16(s, TCG_REG_TMP, data_r); - data_r = TCG_REG_TMP; - } tcg_out_ldst_r(s, I3312_STRH, data_r, addr_r, otype, off_r); break; case MO_32: - if (bswap && data_r != TCG_REG_XZR) { - tcg_out_rev32(s, TCG_REG_TMP, data_r); - data_r = TCG_REG_TMP; - } tcg_out_ldst_r(s, I3312_STRW, data_r, addr_r, otype, off_r); break; case MO_64: - if (bswap && data_r != TCG_REG_XZR) { - tcg_out_rev64(s, TCG_REG_TMP, data_r); - data_r = TCG_REG_TMP; - } tcg_out_ldst_r(s, I3312_STRX, data_r, addr_r, otype, off_r); break; default: - tcg_abort(); + g_assert_not_reached(); } } @@ -1578,6 +1541,8 @@ static void tcg_out_qemu_ld(TCGContext *s, TCGReg data_reg, TCGReg addr_reg, { TCGMemOp memop = get_memop(oi); + tcg_debug_assert(!(memop & MO_BSWAP)); + #ifdef CONFIG_SOFTMMU /* Ignore the requested "ext". We get the same correct result from * a 16-bit sign-extended to 64-bit as we do sign-extended to 32-bit, @@ -1608,6 +1573,8 @@ static void tcg_out_qemu_st(TCGContext *s, TCGReg data_reg, TCGReg addr_reg, { TCGMemOp memop = get_memop(oi); + tcg_debug_assert(!(memop & MO_BSWAP)); + #ifdef CONFIG_SOFTMMU bool is_64 = (memop & MO_SIZE) == MO_64;