diff mbox series

[24/26] target/arm: Enable PAuth for user-only -cpu max

Message ID 20181207103631.28193-25-richard.henderson@linaro.org (mailing list archive)
State New, archived
Headers show
Series target/arm: Implement ARMv8.3-PAuth | expand

Commit Message

Richard Henderson Dec. 7, 2018, 10:36 a.m. UTC 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/cpu64.c | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Peter Maydell Dec. 11, 2018, 3:45 p.m. UTC | #1 
On Fri, 7 Dec 2018 at 10:37, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  target/arm/cpu64.c | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
> index 1d57be0c91..84f70b2a24 100644
> --- a/target/arm/cpu64.c
> +++ b/target/arm/cpu64.c
> @@ -316,6 +316,10 @@ static void aarch64_max_initfn(Object *obj)
>
>          t = cpu->isar.id_aa64isar1;
>          t = FIELD_DP64(t, ID_AA64ISAR1, FCMA, 1);
> +        t = FIELD_DP64(t, ID_AA64ISAR1, APA, 1); /* PAuth, architected only */
> +        t = FIELD_DP64(t, ID_AA64ISAR1, API, 0);
> +        t = FIELD_DP64(t, ID_AA64ISAR1, GPA, 1);
> +        t = FIELD_DP64(t, ID_AA64ISAR1, GPI, 0);
>          cpu->isar.id_aa64isar1 = t;
>
>          t = cpu->isar.id_aa64pfr0;

I don't see why this is enabling for user-only and
not also for system: what am I missing ?

thanks
-- PMM
Richard Henderson Dec. 11, 2018, 6:24 p.m. UTC | #2 
On 12/11/18 9:45 AM, Peter Maydell wrote:
> On Fri, 7 Dec 2018 at 10:37, Richard Henderson
> <richard.henderson@linaro.org> wrote:
>>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>>  target/arm/cpu64.c | 4 ++++
>>  1 file changed, 4 insertions(+)
>>
>> diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
>> index 1d57be0c91..84f70b2a24 100644
>> --- a/target/arm/cpu64.c
>> +++ b/target/arm/cpu64.c
>> @@ -316,6 +316,10 @@ static void aarch64_max_initfn(Object *obj)
>>
>>          t = cpu->isar.id_aa64isar1;
>>          t = FIELD_DP64(t, ID_AA64ISAR1, FCMA, 1);
>> +        t = FIELD_DP64(t, ID_AA64ISAR1, APA, 1); /* PAuth, architected only */
>> +        t = FIELD_DP64(t, ID_AA64ISAR1, API, 0);
>> +        t = FIELD_DP64(t, ID_AA64ISAR1, GPA, 1);
>> +        t = FIELD_DP64(t, ID_AA64ISAR1, GPI, 0);
>>          cpu->isar.id_aa64isar1 = t;
>>
>>          t = cpu->isar.id_aa64pfr0;
> 
> I don't see why this is enabling for user-only and
> not also for system: what am I missing ?

Err.. more brain fluff.  This does enable for system;
it's the next patch that's for user-only.


r~
diff mbox series

Patch

diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 1d57be0c91..84f70b2a24 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -316,6 +316,10 @@  static void aarch64_max_initfn(Object *obj)
 
         t = cpu->isar.id_aa64isar1;
         t = FIELD_DP64(t, ID_AA64ISAR1, FCMA, 1);
+        t = FIELD_DP64(t, ID_AA64ISAR1, APA, 1); /* PAuth, architected only */
+        t = FIELD_DP64(t, ID_AA64ISAR1, API, 0);
+        t = FIELD_DP64(t, ID_AA64ISAR1, GPA, 1);
+        t = FIELD_DP64(t, ID_AA64ISAR1, GPI, 0);
         cpu->isar.id_aa64isar1 = t;
 
         t = cpu->isar.id_aa64pfr0;