| Message ID | 20181209193749.12277-10-cota@braap.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Plugin support | expand |
Emilio G. Cota <cota@braap.org> writes: > This will be used by plugins to get the host address > of instructions. > > Signed-off-by: Emilio G. Cota <cota@braap.org> > --- > include/exec/exec-all.h | 13 +++++++++++++ > accel/tcg/cputlb.c | 14 +++++++++++++- > 2 files changed, 26 insertions(+), 1 deletion(-) > > diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h > index 815e5b1e83..afcc01e0e3 100644 > --- a/include/exec/exec-all.h > +++ b/include/exec/exec-all.h > @@ -22,6 +22,7 @@ > > #include "qemu-common.h" > #include "exec/tb-context.h" > +#include "exec/cpu_ldst.h" > #include "sysemu/cpus.h" > > /* allow to see translation results - the slowdown should be negligible, so we leave it */ > @@ -487,12 +488,24 @@ static inline tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong > { > return addr; > } > + > +static inline tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env1, > + target_ulong addr, > + void **hostp) > +{ > + if (hostp) { > + *hostp = g2h(addr); > + } > + return addr; > +} > #else > static inline void mmap_lock(void) {} > static inline void mmap_unlock(void) {} > > /* cputlb.c */ > tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong addr); > +tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env1, target_ulong addr, > + void **hostp); > It's probably about time these helpers got proper doc headers. So I take it the host address of an instruction is where in host memory the code is or where in host memory the translation for that instruction is? > void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length); > void tlb_set_dirty(CPUState *cpu, target_ulong vaddr); > diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c > index e3582f2f1d..5c61908084 100644 > --- a/accel/tcg/cputlb.c > +++ b/accel/tcg/cputlb.c > @@ -1069,7 +1069,8 @@ static bool victim_tlb_hit(CPUArchState *env, size_t mmu_idx, size_t index, > * is actually a ram_addr_t (in system mode; the user mode emulation > * version of this function returns a guest virtual address). > */ > -tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr) > +tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, target_ulong addr, > + void **hostp) > { > uintptr_t mmu_idx = cpu_mmu_index(env, true); > uintptr_t index = tlb_index(env, mmu_idx, addr); > @@ -1092,13 +1093,24 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr) > * than a target page, so we must redo the MMU check every insn > * - TLB_MMIO: region is not backed by RAM > */ > + if (hostp) { > + *hostp = NULL; > + } > return -1; > } > > p = (void *)((uintptr_t)addr + entry->addend); > + if (hostp) { > + *hostp = p; > + } > return qemu_ram_addr_from_host_nofail(p); > } > > +tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr) > +{ > + return get_page_addr_code_hostp(env, addr, NULL); > +} > + > /* Probe for whether the specified guest write access is permitted. > * If it is not permitted then an exception will be taken in the same > * way as if this were a real write access (and we will not return). -- Alex Bennée
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 815e5b1e83..afcc01e0e3 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -22,6 +22,7 @@ #include "qemu-common.h" #include "exec/tb-context.h" +#include "exec/cpu_ldst.h" #include "sysemu/cpus.h" /* allow to see translation results - the slowdown should be negligible, so we leave it */ @@ -487,12 +488,24 @@ static inline tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong { return addr; } + +static inline tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env1, + target_ulong addr, + void **hostp) +{ + if (hostp) { + *hostp = g2h(addr); + } + return addr; +} #else static inline void mmap_lock(void) {} static inline void mmap_unlock(void) {} /* cputlb.c */ tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong addr); +tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env1, target_ulong addr, + void **hostp); void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length); void tlb_set_dirty(CPUState *cpu, target_ulong vaddr); diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index e3582f2f1d..5c61908084 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1069,7 +1069,8 @@ static bool victim_tlb_hit(CPUArchState *env, size_t mmu_idx, size_t index, * is actually a ram_addr_t (in system mode; the user mode emulation * version of this function returns a guest virtual address). */ -tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr) +tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, target_ulong addr, + void **hostp) { uintptr_t mmu_idx = cpu_mmu_index(env, true); uintptr_t index = tlb_index(env, mmu_idx, addr); @@ -1092,13 +1093,24 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr) * than a target page, so we must redo the MMU check every insn * - TLB_MMIO: region is not backed by RAM */ + if (hostp) { + *hostp = NULL; + } return -1; } p = (void *)((uintptr_t)addr + entry->addend); + if (hostp) { + *hostp = p; + } return qemu_ram_addr_from_host_nofail(p); } +tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr) +{ + return get_page_addr_code_hostp(env, addr, NULL); +} + /* Probe for whether the specified guest write access is permitted. * If it is not permitted then an exception will be taken in the same * way as if this were a real write access (and we will not return).
This will be used by plugins to get the host address of instructions. Signed-off-by: Emilio G. Cota <cota@braap.org> --- include/exec/exec-all.h | 13 +++++++++++++ accel/tcg/cputlb.c | 14 +++++++++++++- 2 files changed, 26 insertions(+), 1 deletion(-)