@@ -38,6 +38,7 @@
#include "trace-tcg.h"
#include "translate-a64.h"
#include "qemu/atomic128.h"
+#include "qemu/plugin.h"
static TCGv_i64 cpu_X[32];
static TCGv_i64 cpu_pc;
@@ -13321,6 +13322,7 @@ static void disas_a64_insn(CPUARMState *env, DisasContext *s)
uint32_t insn;
insn = arm_ldl_code(env, s->pc, s->sctlr_b);
+ plugin_insn_append(&insn, sizeof(insn));
s->insn = insn;
s->pc += 4;
@@ -13234,6 +13234,7 @@ static void arm_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
}
insn = arm_ldl_code(env, dc->pc, dc->sctlr_b);
+ plugin_insn_append(&insn, sizeof(insn));
dc->insn = insn;
dc->pc += 4;
disas_arm_insn(dc, insn);
@@ -13304,11 +13305,16 @@ static void thumb_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
insn = arm_lduw_code(env, dc->pc, dc->sctlr_b);
is_16bit = thumb_insn_is_16bit(dc, insn);
dc->pc += 2;
- if (!is_16bit) {
+ if (is_16bit) {
+ uint16_t insn16 = insn;
+
+ plugin_insn_append(&insn16, sizeof(insn16));
+ } else {
uint32_t insn2 = arm_lduw_code(env, dc->pc, dc->sctlr_b);
insn = insn << 16 | insn2;
dc->pc += 2;
+ plugin_insn_append(&insn, sizeof(insn));
}
dc->insn = insn;
I considered using translator_ld* from arm_ldl_code et al. However, note that there's a helper that also calls arm_ldl_code, so we'd have to change that caller. In thumb's case I'm also calling plugin_insn_append directly, since we can't assume that all instructions are 16 bits long. Signed-off-by: Emilio G. Cota <cota@braap.org> --- target/arm/translate-a64.c | 2 ++ target/arm/translate.c | 8 +++++++- 2 files changed, 9 insertions(+), 1 deletion(-)