From patchwork Fri Dec 14 05:23:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 10730511 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D5FD291E for ; Fri, 14 Dec 2018 05:29:04 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C60552C978 for ; Fri, 14 Dec 2018 05:29:04 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BA9322C97A; Fri, 14 Dec 2018 05:29:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 435B62C978 for ; Fri, 14 Dec 2018 05:29:04 +0000 (UTC) Received: from localhost ([::1]:59454 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gXg23-0000YV-E6 for patchwork-qemu-devel@patchwork.kernel.org; Fri, 14 Dec 2018 00:29:03 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55755) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gXfxi-0004TQ-Fx for qemu-devel@nongnu.org; Fri, 14 Dec 2018 00:24:35 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gXfxc-0005Of-9O for qemu-devel@nongnu.org; Fri, 14 Dec 2018 00:24:32 -0500 Received: from mail-ot1-x342.google.com ([2607:f8b0:4864:20::342]:45883) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gXfxc-0005OX-3g for qemu-devel@nongnu.org; Fri, 14 Dec 2018 00:24:28 -0500 Received: by mail-ot1-x342.google.com with SMTP id 32so4274299ota.12 for ; Thu, 13 Dec 2018 21:24:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ibadInM9T3RbGOG0kOgkioR76NG5vSTRyjFmOZT3e1M=; b=G2FyXZk5IaBTItH2bFlTAdbIuCghqoWFITr6oD9zN7Wkku1wsOVuYeVFuPXuAgmgDc NQyWbZygE8j1djJviIGQOdz2pNWKYcFoJxW8tUxrZwa2/f5s+t5AjYkJDC6nt9OYdrWr wiAOUhnNYdPyli4OjyXPUcyEdQvU4qmQQTDCY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ibadInM9T3RbGOG0kOgkioR76NG5vSTRyjFmOZT3e1M=; b=QDUNv+g1z4VkjWZgJDPAIqxvx3nzTDPUdd7VHxotGvYao9W4VB/ftUn7oSX/gJlUaf 9kbEeGOjVqyx8T9NdR1bDVPB+5uHyXgvc9w2qnWBpBr+LUfqxLk9mBhhH1zUt8dXzqFb p3RGdiiCQaJdg5QZZUA8MK+MyhnPW+ctmzwK2tj1G0Pf1KpGVrF1TDT15Up5TQbbkIW8 oN3MXOQK5pliqoBXP4RvjiG0QtqgP5oBWvNhRAjaDaPWQZYMLdARDGTtuQGehhGEL6U6 NDZ0hvycfUK/i/CMhkWERdYFY932J+kvQpAkA2eX3ufPHgfkLqLrKCqrC3Sea5Sy0OnF fOeg== X-Gm-Message-State: AA+aEWb6vmLeQqFcc49ZlFxql6Ji9KCIAuke60aJvDweXZu0TOgnHvk6 cUIMtcWe13wbHaNvUcMnKyxNe6NyJpjqpA== X-Google-Smtp-Source: AFSGD/VN32txiWvjGJ1xzdA25JdD9/lAISwgiGANbouq82eocfrGp2b5GpvgzmakGUKxN/AcjPoJ8Q== X-Received: by 2002:a9d:7059:: with SMTP id x25mr1204767otj.35.1544765067129; Thu, 13 Dec 2018 21:24:27 -0800 (PST) Received: from cloudburst.twiddle.net ([187.217.227.243]) by smtp.gmail.com with ESMTPSA id r1sm1845379oti.44.2018.12.13.21.24.26 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 13 Dec 2018 21:24:26 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 13 Dec 2018 23:23:55 -0600 Message-Id: <20181214052410.11863-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181214052410.11863-1-richard.henderson@linaro.org> References: <20181214052410.11863-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::342 Subject: [Qemu-devel] [PATCH v2 12/27] target/arm: Decode PAuth within disas_uncond_b_reg X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/translate-a64.c | 82 +++++++++++++++++++++++++++++++++++++- 1 file changed, 81 insertions(+), 1 deletion(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 30086a5d7f..e62d248894 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -1982,6 +1982,7 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn) { unsigned int opc, op2, op3, rn, op4; TCGv_i64 dst; + TCGv_i64 modifier; opc = extract32(insn, 21, 4); op2 = extract32(insn, 16, 5); @@ -1999,12 +2000,44 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn) case 2: /* RET */ switch (op3) { case 0: + /* BR, BLR, RET */ if (op4 != 0) { goto do_unallocated; } dst = cpu_reg(s, rn); break; + case 2: + case 3: + if (!dc_isar_feature(aa64_pauth, s)) { + goto do_unallocated; + } + if (opc == 2) { + /* RETAA, RETAB */ + if (rn != 0x1f || op4 != 0x1f) { + goto do_unallocated; + } + rn = 30; + modifier = cpu_X[31]; + } else { + /* BRAAZ, BRABZ, BLRAAZ, BLRABZ */ + if (op4 != 0x1f) { + goto do_unallocated; + } + modifier = new_tmp_a64_zero(s); + } + if (s->pauth_active) { + dst = new_tmp_a64(s); + if (op3 == 2) { + gen_helper_autia(dst, cpu_env, cpu_reg(s, rn), modifier); + } else { + gen_helper_autib(dst, cpu_env, cpu_reg(s, rn), modifier); + } + } else { + dst = cpu_reg(s, rn); + } + break; + default: goto do_unallocated; } @@ -2016,12 +2049,38 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn) } break; + case 8: /* BRAA */ + case 9: /* BLRAA */ + if (!dc_isar_feature(aa64_pauth, s)) { + goto do_unallocated; + } + if (op3 != 2 || op3 != 3) { + goto do_unallocated; + } + if (s->pauth_active) { + dst = new_tmp_a64(s); + modifier = cpu_reg_sp(s, op4); + if (op3 == 2) { + gen_helper_autia(dst, cpu_env, cpu_reg(s, rn), modifier); + } else { + gen_helper_autib(dst, cpu_env, cpu_reg(s, rn), modifier); + } + } else { + dst = cpu_reg(s, rn); + } + gen_a64_set_pc(s, dst); + /* BLRAA also needs to load return address */ + if (opc == 9) { + tcg_gen_movi_i64(cpu_reg(s, 30), s->pc); + } + break; + case 4: /* ERET */ if (s->current_el == 0) { goto do_unallocated; } switch (op3) { - case 0: + case 0: /* ERET */ if (op4 != 0) { goto do_unallocated; } @@ -2030,6 +2089,27 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn) offsetof(CPUARMState, elr_el[s->current_el])); break; + case 2: /* ERETAA */ + case 3: /* ERETAB */ + if (!dc_isar_feature(aa64_pauth, s)) { + goto do_unallocated; + } + if (rn != 0x1f || op4 != 0x1f) { + goto do_unallocated; + } + dst = tcg_temp_new_i64(); + tcg_gen_ld_i64(dst, cpu_env, + offsetof(CPUARMState, elr_el[s->current_el])); + if (s->pauth_active) { + modifier = cpu_X[31]; + if (op3 == 2) { + gen_helper_autia(dst, cpu_env, dst, modifier); + } else { + gen_helper_autib(dst, cpu_env, dst, modifier); + } + } + break; + default: goto do_unallocated; }