@@ -288,4 +288,7 @@ struct MachineState {
} \
type_init(machine_initfn##_register_types)
+extern GlobalProperty hw_compat_3_1[];
+extern const size_t hw_compat_3_1_len;
+
#endif
@@ -1,17 +1,6 @@
#ifndef HW_COMPAT_H
#define HW_COMPAT_H
-#define HW_COMPAT_3_1 \
- {\
- .driver = "pcie-root-port",\
- .property = "x-speed",\
- .value = "2_5",\
- },{\
- .driver = "pcie-root-port",\
- .property = "x-width",\
- .value = "1",\
- },
-
#define HW_COMPAT_3_0 \
/* empty */
@@ -294,13 +294,8 @@ int e820_add_entry(uint64_t, uint64_t, uint32_t);
int e820_get_num_entries(void);
bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
-#define PC_COMPAT_3_1 \
- HW_COMPAT_3_1 \
- {\
- .driver = "intel-iommu",\
- .property = "dma-drain",\
- .value = "off",\
- },
+extern GlobalProperty pc_compat_3_1[];
+extern const size_t pc_compat_3_1_len;
#define PC_COMPAT_3_0 \
HW_COMPAT_3_0 \
@@ -1874,12 +1874,8 @@ DEFINE_VIRT_MACHINE_AS_LATEST(4, 0)
static void virt_machine_3_1_options(MachineClass *mc)
{
- static GlobalProperty compat[] = {
- HW_COMPAT_3_1
- };
-
virt_machine_4_0_options(mc);
- compat_props_add(mc->compat_props, compat, G_N_ELEMENTS(compat));
+ compat_props_add(mc->compat_props, hw_compat_3_1, hw_compat_3_1_len);
}
DEFINE_VIRT_MACHINE(3, 1)
@@ -22,6 +22,19 @@
#include "qemu/error-report.h"
#include "sysemu/qtest.h"
+GlobalProperty hw_compat_3_1[] = {
+ {
+ .driver = "pcie-root-port",
+ .property = "x-speed",
+ .value = "2_5",
+ },{
+ .driver = "pcie-root-port",
+ .property = "x-width",
+ .value = "1",
+ },
+};
+const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1);
+
static char *machine_get_accel(Object *obj, Error **errp)
{
MachineState *ms = MACHINE(obj);
@@ -109,6 +109,15 @@ static struct e820_entry *e820_table;
static unsigned e820_entries;
struct hpet_fw_config hpet_cfg = {.count = UINT8_MAX};
+GlobalProperty pc_compat_3_1[] = {
+ {
+ .driver = "intel-iommu",
+ .property = "dma-drain",
+ .value = "off",
+ },
+};
+const size_t pc_compat_3_1_len = G_N_ELEMENTS(pc_compat_3_1);
+
void gsi_handler(void *opaque, int n, int level)
{
GSIState *s = opaque;
@@ -440,14 +440,11 @@ DEFINE_I440FX_MACHINE(v4_0, "pc-i440fx-4.0", NULL,
static void pc_i440fx_3_1_machine_options(MachineClass *m)
{
- static GlobalProperty compat[] = {
- PC_COMPAT_3_1
- };
-
pc_i440fx_4_0_machine_options(m);
m->is_default = 0;
m->alias = NULL;
- compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
+ compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len);
+ compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len);
}
DEFINE_I440FX_MACHINE(v3_1, "pc-i440fx-3.1", NULL,
@@ -323,14 +323,11 @@ DEFINE_Q35_MACHINE(v4_0, "pc-q35-4.0", NULL,
static void pc_q35_3_1_machine_options(MachineClass *m)
{
- static GlobalProperty compat[] = {
- PC_COMPAT_3_1
- };
-
pc_q35_4_0_machine_options(m);
m->default_kernel_irqchip_split = false;
m->alias = NULL;
- compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
+ compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len);
+ compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len);
}
DEFINE_Q35_MACHINE(v3_1, "pc-q35-3.1", NULL,
@@ -4023,12 +4023,8 @@ DEFINE_SPAPR_MACHINE(4_0, "4.0", true);
*/
static void spapr_machine_3_1_class_options(MachineClass *mc)
{
- static GlobalProperty compat[] = {
- HW_COMPAT_3_1
- };
-
spapr_machine_4_0_class_options(mc);
- compat_props_add(mc->compat_props, compat, G_N_ELEMENTS(compat));
+ compat_props_add(mc->compat_props, hw_compat_3_1, hw_compat_3_1_len);
mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power8_v2.0");
}
@@ -667,12 +667,8 @@ static void ccw_machine_3_1_instance_options(MachineState *machine)
static void ccw_machine_3_1_class_options(MachineClass *mc)
{
- static GlobalProperty compat[] = {
- HW_COMPAT_3_1
- };
-
ccw_machine_4_0_class_options(mc);
- compat_props_add(mc->compat_props, compat, G_N_ELEMENTS(compat));
+ compat_props_add(mc->compat_props, hw_compat_3_1, hw_compat_3_1_len);
}
DEFINE_CCW_MACHINE(3_1, "3.1", false);