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(jcmvbkbc-1-pt.tunnel.tserv24.sto1.ipv6.he.net. [2001:470:27:1fa::2]) by smtp.gmail.com with ESMTPSA id q20sm2649852lfj.20.2019.01.27.18.10.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 27 Jan 2019 18:10:03 -0800 (PST) From: Max Filippov To: qemu-devel@nongnu.org Date: Sun, 27 Jan 2019 18:09:36 -0800 Message-Id: <20190128020937.22775-4-jcmvbkbc@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190128020937.22775-1-jcmvbkbc@gmail.com> References: <20190128020937.22775-1-jcmvbkbc@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::244 Subject: [Qemu-devel] [PATCH 3/4] hw/xtensa: xtfpga: use MX PIC for SMP X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Create and use MX PIC as a peripheral interrupt controller when more than 1 processor is enabled on xtfpga board. Connect xtensa CPU cores to the MX PIC and select secondary reset vector on all cores except the first one. Signed-off-by: Max Filippov --- hw/xtensa/xtfpga.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c index 3102f8c04709..792a225e03a2 100644 --- a/hw/xtensa/xtfpga.c +++ b/hw/xtensa/xtfpga.c @@ -45,6 +45,7 @@ #include "qemu/option.h" #include "bootparam.h" #include "xtensa_memory.h" +#include "hw/xtensa/mx_pic.h" typedef struct XtfpgaFlashDesc { hwaddr base; @@ -225,6 +226,7 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine) XtensaCPU *cpu = NULL; CPUXtensaState *env = NULL; MemoryRegion *system_io; + XtensaMxPic *mx_pic = NULL; qemu_irq *extints; DriveInfo *dinfo; pflash_t *flash = NULL; @@ -237,6 +239,10 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine) uint32_t freq = 10000000; int n; + if (smp_cpus > 1) { + mx_pic = xtensa_mx_pic_init(31); + qemu_register_reset(xtensa_mx_pic_reset, mx_pic); + } for (n = 0; n < smp_cpus; n++) { CPUXtensaState *cenv = NULL; @@ -247,14 +253,28 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine) freq = env->config->clock_freq_khz * 1000; } + if (mx_pic) { + MemoryRegion *mx_eri; + + mx_eri = xtensa_mx_pic_register_cpu(mx_pic, + xtensa_get_extints(cenv), + xtensa_get_runstall(cenv)); + memory_region_add_subregion(xtensa_get_er_region(cenv), + 0, mx_eri); + } cenv->sregs[PRID] = n; + xtensa_select_static_vectors(cenv, n != 0); qemu_register_reset(xtfpga_reset, cpu); /* Need MMU initialized prior to ELF loading, * so that ELF gets loaded into virtual addresses */ cpu_reset(CPU(cpu)); } - extints = xtensa_get_extints(env); + if (smp_cpus > 1) { + extints = xtensa_mx_pic_get_extints(mx_pic); + } else { + extints = xtensa_get_extints(env); + } if (env) { XtensaMemory sysram = env->config->sysram;