Message ID | 20190130004811.27372-56-cota@braap.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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Cota" <cota@braap.org> To: qemu-devel@nongnu.org Date: Tue, 29 Jan 2019 19:47:53 -0500 Message-Id: <20190130004811.27372-56-cota@braap.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190130004811.27372-1-cota@braap.org> References: <20190130004811.27372-1-cota@braap.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 66.111.4.25 Subject: [Qemu-devel] [PATCH v6 55/73] sparc: convert to cpu_interrupt_request X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel/> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Cc: Paolo Bonzini <pbonzini@redhat.com>, Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>, Richard Henderson <richard.henderson@linaro.org>, Artyom Tarasenko <atar4qemu@gmail.com> Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org> X-Virus-Scanned: ClamAV using ClamSMTP |
Series |
per-CPU locks
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expand
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diff --git a/hw/sparc64/sparc64.c b/hw/sparc64/sparc64.c index 372bbd4f5b..58faeb111a 100644 --- a/hw/sparc64/sparc64.c +++ b/hw/sparc64/sparc64.c @@ -56,7 +56,7 @@ void cpu_check_irqs(CPUSPARCState *env) /* The bit corresponding to psrpil is (1<< psrpil), the next bit is (2 << psrpil). */ if (pil < (2 << env->psrpil)) { - if (cs->interrupt_request & CPU_INTERRUPT_HARD) { + if (cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD) { trace_sparc64_cpu_check_irqs_reset_irq(env->interrupt_index); env->interrupt_index = 0; cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); @@ -87,7 +87,7 @@ void cpu_check_irqs(CPUSPARCState *env) break; } } - } else if (cs->interrupt_request & CPU_INTERRUPT_HARD) { + } else if (cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD) { trace_sparc64_cpu_check_irqs_disabled(pil, env->pil_in, env->softint, env->interrupt_index); env->interrupt_index = 0; diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 4a4445bdf5..933fd8e954 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -708,7 +708,7 @@ static bool sparc_cpu_has_work(CPUState *cs) SPARCCPU *cpu = SPARC_CPU(cs); CPUSPARCState *env = &cpu->env; - return (cs->interrupt_request & CPU_INTERRUPT_HARD) && + return (cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD) && cpu_interrupts_enabled(env); }