From patchwork Mon Feb 11 18:19:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sven Schnelle X-Patchwork-Id: 10806605 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EE48013BF for ; Mon, 11 Feb 2019 18:22:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DF4212B176 for ; Mon, 11 Feb 2019 18:22:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D384F2B183; Mon, 11 Feb 2019 18:22:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 829EB2B18C for ; Mon, 11 Feb 2019 18:22:01 +0000 (UTC) Received: from localhost ([127.0.0.1]:54253 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gtGDQ-0004nD-RE for patchwork-qemu-devel@patchwork.kernel.org; Mon, 11 Feb 2019 13:22:00 -0500 Received: from eggs.gnu.org ([209.51.188.92]:48003) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gtGCC-0004lk-0R for qemu-devel@nongnu.org; Mon, 11 Feb 2019 13:20:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gtGCA-0004NA-3g for qemu-devel@nongnu.org; Mon, 11 Feb 2019 13:20:43 -0500 Received: from smtp.duncanthrax.net ([2001:470:70c5:1111::170]:50060) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gtGC2-00048a-2g for qemu-devel@nongnu.org; Mon, 11 Feb 2019 13:20:36 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=duncanthrax.net; s=dkim; h=Content-Transfer-Encoding:MIME-Version: References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=lSQSYETAdgTS7/gTbxvxDGRRLDZKJWpz4F0pk2QFL6c=; b=Hn3YwvuEvK2jDOGHWfubrrfxHw uxi+H2ojAj3bB91t4xj/UeWAJSnEXGcU3buAfW9DJoDT/b8w/UP13ki5lWXUhhKTxTxp60yxyuZ7V CqIFR54GmDhqnXQWVE0Jy5FSyGmEGaXNzSLc3K8fXLVYpTLpWSYk1VJQvhl4ReR2PmgA=; Received: from hsi-kbw-109-193-150-175.hsi7.kabel-badenwuerttemberg.de ([109.193.150.175] helo=t470p.stackframe.org) by smtp.eurescom.eu with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1gtGBt-0007Z5-Jc; Mon, 11 Feb 2019 19:20:25 +0100 From: Sven Schnelle To: qemu-devel@nongnu.org Date: Mon, 11 Feb 2019 19:19:06 +0100 Message-Id: <20190211181907.2219-5-svens@stackframe.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190211181907.2219-2-svens@stackframe.org> References: <20190211181907.2219-2-svens@stackframe.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:470:70c5:1111::170 Subject: [Qemu-devel] [PATCH 4/5] target/hppa: fix sed conditions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: deller@gmx.de, Sven Schnelle , Richard Henderson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Now that do_cond() uses sign overflow for some condition matches we need to roll our own version without sign overflow checks. Signed-off-by: Sven Schnelle --- target/hppa/translate.c | 34 +++++++++++++++++++++++----------- 1 file changed, 23 insertions(+), 11 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index bce8773b1a..d858fabd3a 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -1029,20 +1029,32 @@ static DisasCond do_log_cond(unsigned cf, TCGv_reg res) /* Similar, but for shift/extract/deposit conditions. */ -static DisasCond do_sed_cond(unsigned orig, TCGv_reg res) +static DisasCond do_sed_cond(unsigned c, TCGv_reg res) { - unsigned c, f; + DisasCond cond; + TCGv_reg tmp; - /* Convert the compressed condition codes to standard. - 0-2 are the same as logicals (nv,<,<=), while 3 is OD. - 4-7 are the reverse of 0-3. */ - c = orig & 3; - if (c == 3) { - c = 7; + switch(c & 3) { + case 0: /* never */ + cond = cond_make_f(); + break; + case 1: /* = all bits are zero */ + cond = cond_make_0(TCG_COND_EQ, res); + break; + case 2: /* < leftmost bit is 1 */ + cond = cond_make_0(TCG_COND_LT, res); + break; + case 3: /* OD rightmost bit is 1 */ + tmp = tcg_temp_new(); + tcg_gen_andi_reg(tmp, res, 1); + cond = cond_make_0(TCG_COND_NE, tmp); + tcg_temp_free(tmp); + break; } - f = (orig & 4) / 4; - - return do_log_cond(c * 2 + f, res); + if (c & 4) { + cond.c = tcg_invert_cond(cond.c); + } + return cond; } /* Similar, but for unit conditions. */