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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 6 Mar 2019 08:50:48 -0000 Received: from d06av21.portsmouth.uk.ibm.com (d06av21.portsmouth.uk.ibm.com [9.149.105.232]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x268olf819398848 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 6 Mar 2019 08:50:47 GMT Received: from d06av21.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 84A9F5205F; Wed, 6 Mar 2019 08:50:47 +0000 (GMT) Received: from smtp.lab.toulouse-stg.fr.ibm.com (unknown [9.101.4.1]) by d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTP id 710F352054; Wed, 6 Mar 2019 08:50:47 +0000 (GMT) Received: from zorba.kaod.org.com (sig-9-145-0-135.uk.ibm.com [9.145.0.135]) by smtp.lab.toulouse-stg.fr.ibm.com (Postfix) with ESMTP id E244E220158; Wed, 6 Mar 2019 09:50:46 +0100 (CET) From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: David Gibson Date: Wed, 6 Mar 2019 09:50:15 +0100 X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190306085032.15744-1-clg@kaod.org> References: <20190306085032.15744-1-clg@kaod.org> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19030608-0008-0000-0000-000002C92534 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19030608-0009-0000-0000-000022352E94 Message-Id: <20190306085032.15744-11-clg@kaod.org> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-03-06_06:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=2 phishscore=0 bulkscore=0 spamscore=0 clxscore=1034 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1903060061 X-MIME-Autoconverted: from 8bit to quoted-printable by mx0a-001b2d01.pphosted.com id x268mTlc048846 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 10/27] ppc/xive: Make XIVE generate the proper interrupt types X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Benjamin Herrenschmidt It should be generic Hypervisor Virtualization interrupts for HV directed rings and traditional External Interrupts for the OS directed ring. Don't generate anything for the user ring as it isn't actually supported. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Cédric Le Goater --- include/hw/ppc/xive.h | 3 ++- hw/intc/xive.c | 22 +++++++++++++++++++--- 2 files changed, 21 insertions(+), 4 deletions(-) diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h index c4f27742ca09..6b89dc7679f9 100644 --- a/include/hw/ppc/xive.h +++ b/include/hw/ppc/xive.h @@ -313,7 +313,8 @@ typedef struct XiveTCTX { DeviceState parent_obj; CPUState *cs; - qemu_irq output; + qemu_irq hv_output; + qemu_irq os_output; uint8_t regs[XIVE_TM_RING_COUNT * XIVE_TM_RING_SIZE]; } XiveTCTX; diff --git a/hw/intc/xive.c b/hw/intc/xive.c index a0b87001da25..237e7b256dc0 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -61,13 +61,28 @@ static uint8_t exception_mask(uint8_t ring) } } +static qemu_irq xive_tctx_output(XiveTCTX *tctx, uint8_t ring) +{ + switch (ring) { + case TM_QW0_USER: + return 0; /* Not supported */ + case TM_QW1_OS: + return tctx->os_output; + case TM_QW2_HV_POOL: + case TM_QW3_HV_PHYS: + return tctx->hv_output; + default: + return 0; + } +} + static uint64_t xive_tctx_accept(XiveTCTX *tctx, uint8_t ring) { uint8_t *regs = &tctx->regs[ring]; uint8_t nsr = regs[TM_NSR]; uint8_t mask = exception_mask(ring); - qemu_irq_lower(tctx->output); + qemu_irq_lower(xive_tctx_output(tctx, ring)); if (regs[TM_NSR] & mask) { uint8_t cppr = regs[TM_PIPR]; @@ -100,7 +115,7 @@ static void xive_tctx_notify(XiveTCTX *tctx, uint8_t ring) default: g_assert_not_reached(); } - qemu_irq_raise(tctx->output); + qemu_irq_raise(xive_tctx_output(tctx, ring)); } } @@ -546,7 +561,8 @@ static void xive_tctx_realize(DeviceState *dev, Error **errp) env = &cpu->env; switch (PPC_INPUT(env)) { case PPC_FLAGS_INPUT_POWER9: - tctx->output = env->irq_inputs[POWER9_INPUT_INT]; + tctx->hv_output = env->irq_inputs[POWER9_INPUT_HINT]; + tctx->os_output = env->irq_inputs[POWER9_INPUT_INT]; break; default: