From patchwork Thu Apr 4 22:12:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 10886579 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 78EAE922 for ; Thu, 4 Apr 2019 22:14:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5E46C28675 for ; Thu, 4 Apr 2019 22:14:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 52040286EE; Thu, 4 Apr 2019 22:14:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E421928675 for ; Thu, 4 Apr 2019 22:14:07 +0000 (UTC) Received: from localhost ([127.0.0.1]:60314 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hCAcZ-0000GU-5i for patchwork-qemu-devel@patchwork.kernel.org; Thu, 04 Apr 2019 18:14:07 -0400 Received: from eggs.gnu.org ([209.51.188.92]:53827) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hCAbU-0007tg-4y for qemu-devel@nongnu.org; Thu, 04 Apr 2019 18:13:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hCAbS-0006kp-B0 for qemu-devel@nongnu.org; Thu, 04 Apr 2019 18:13:00 -0400 Received: from mx1.redhat.com ([209.132.183.28]:43736) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hCAbO-0006dB-Hm for qemu-devel@nongnu.org; Thu, 04 Apr 2019 18:12:56 -0400 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 067CE7DCE7; Thu, 4 Apr 2019 22:12:53 +0000 (UTC) Received: from x1w.redhat.com (unknown [10.40.205.179]) by smtp.corp.redhat.com (Postfix) with ESMTPS id CAA2860BF7; Thu, 4 Apr 2019 22:12:50 +0000 (UTC) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Thomas Huth Date: Fri, 5 Apr 2019 00:12:36 +0200 Message-Id: <20190404221238.12468-3-philmd@redhat.com> In-Reply-To: <20190404221238.12468-1-philmd@redhat.com> References: <20190404221238.12468-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Thu, 04 Apr 2019 22:12:53 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH for-4.1 2/4] hw/isa/superio: Support more than one IDE bus X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Michael S. Tsirkin" , Aleksandar Rikalo , Aleksandar Markovic , Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP The current code is limited to a single IDE bus (supporting two IDE drives). Some Super I/O chipset provide two IDE buses (four IDE drives). Modify the model to support more that one IDE bus. Signed-off-by: Philippe Mathieu-Daudé --- hw/isa/isa-superio.c | 43 ++++++++++++++++++++++------------------ include/hw/isa/superio.h | 2 +- 2 files changed, 25 insertions(+), 20 deletions(-) diff --git a/hw/isa/isa-superio.c b/hw/isa/isa-superio.c index c6845eaf578..b0761ea1f96 100644 --- a/hw/isa/isa-superio.c +++ b/hw/isa/isa-superio.c @@ -18,6 +18,7 @@ #include "hw/isa/superio.h" #include "hw/input/i8042.h" #include "hw/char/serial.h" +#include "hw/ide.h" #include "trace.h" static void isa_superio_realize(DeviceState *dev, Error **errp) @@ -30,7 +31,7 @@ static void isa_superio_realize(DeviceState *dev, Error **errp) Chardev *chr; DriveInfo *drive; char *name; - int i; + int i, j; /* Parallel port */ for (i = 0; i < k->parallel.count; i++) { @@ -146,25 +147,29 @@ static void isa_superio_realize(DeviceState *dev, Error **errp) s->kbc = isa_create_simple(bus, TYPE_I8042); /* IDE */ - if (k->ide.count && (!k->ide.is_enabled || k->ide.is_enabled(s, 0))) { - isa = isa_create(bus, "isa-ide"); - d = DEVICE(isa); - if (k->ide.get_iobase) { - qdev_prop_set_uint32(d, "iobase", k->ide.get_iobase(s, 0)); - } - if (k->ide.get_iobase) { - qdev_prop_set_uint32(d, "iobase2", k->ide.get_iobase(s, 1)); - } - if (k->ide.get_irq) { - qdev_prop_set_uint32(d, "irq", k->ide.get_irq(s, 0)); + size_t bus_count = k->ide.count / MAX_IDE_DEVS; + s->ide = g_new(ISADevice *, bus_count); + for (i = 0, j = 0; i < bus_count; i++, j += MAX_IDE_DEVS) { + if (!k->ide.is_enabled || k->ide.is_enabled(s, j)) { + isa = isa_create(bus, "isa-ide"); + d = DEVICE(isa); + if (k->ide.get_iobase) { + qdev_prop_set_uint32(d, "iobase", k->ide.get_iobase(s, j)); + } + if (k->ide.get_iobase) { + qdev_prop_set_uint32(d, "iobase2", k->ide.get_iobase(s, j + 1)); + } + if (k->ide.get_irq) { + qdev_prop_set_uint32(d, "irq", k->ide.get_irq(s, j)); + } + qdev_init_nofail(d); + s->ide[i] = isa; + trace_superio_create_ide(i, + k->ide.get_iobase ? + k->ide.get_iobase(s, j) : -1, + k->ide.get_irq ? + k->ide.get_irq(s, j) : -1); } - qdev_init_nofail(d); - s->ide = isa; - trace_superio_create_ide(0, - k->ide.get_iobase ? - k->ide.get_iobase(s, 0) : -1, - k->ide.get_irq ? - k->ide.get_irq(s, 0) : -1); } } diff --git a/include/hw/isa/superio.h b/include/hw/isa/superio.h index 345f0060817..980a9691696 100644 --- a/include/hw/isa/superio.h +++ b/include/hw/isa/superio.h @@ -33,7 +33,7 @@ typedef struct ISASuperIODevice { ISADevice *serial[SUPERIO_MAX_SERIAL_PORTS]; ISADevice *floppy; ISADevice *kbc; - ISADevice *ide; + ISADevice **ide; } ISASuperIODevice; typedef struct ISASuperIOFuncs {