From patchwork Wed Apr 10 19:48:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Weil X-Patchwork-Id: 10894629 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D62CB13B5 for ; Wed, 10 Apr 2019 19:58:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C0B7C289EA for ; Wed, 10 Apr 2019 19:58:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B4A3328889; Wed, 10 Apr 2019 19:58:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5A4EC28889 for ; Wed, 10 Apr 2019 19:58:46 +0000 (UTC) Received: from localhost ([127.0.0.1]:37096 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hEJMr-0001G9-0f for patchwork-qemu-devel@patchwork.kernel.org; Wed, 10 Apr 2019 15:58:45 -0400 Received: from eggs.gnu.org ([209.51.188.92]:59001) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hEJME-0000x2-Pf for qemu-devel@nongnu.org; Wed, 10 Apr 2019 15:58:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hEJMD-0005wO-Rc for qemu-devel@nongnu.org; Wed, 10 Apr 2019 15:58:06 -0400 Received: from mail.weilnetz.de ([37.120.169.71]:46382 helo=v2201612906741603.powersrv.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hEJMD-0005w5-Jf for qemu-devel@nongnu.org; Wed, 10 Apr 2019 15:58:05 -0400 Received: from localhost (localhost [127.0.0.1]) by v2201612906741603.powersrv.de (Postfix) with ESMTP id 00827DB1F96; Wed, 10 Apr 2019 21:48:44 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at v2201612906741603.powersrv.de Received: from v2201612906741603.powersrv.de ([127.0.0.1]) by localhost (v2201612906741603.powersrv.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id S2ZBroo6CLon; Wed, 10 Apr 2019 21:48:43 +0200 (CEST) Received: from qemu.weilnetz.de (qemu.weilnetz.de [188.68.58.204]) by v2201612906741603.powersrv.de (Postfix) with ESMTP id 50466DB165C; Wed, 10 Apr 2019 21:48:43 +0200 (CEST) Received: by qemu.weilnetz.de (Postfix, from userid 1000) id 3D11D460011; Wed, 10 Apr 2019 21:48:43 +0200 (CEST) From: Stefan Weil To: qemu-devel@nongnu.org Date: Wed, 10 Apr 2019 21:48:38 +0200 Message-Id: <20190410194838.10123-1-sw@weilnetz.de> X-Mailer: git-send-email 2.11.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 37.120.169.71 Subject: [Qemu-devel] [PATCH] tci: Add implementation for INDEX_op_ld16u_i64 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stefan Weil , Thomas Huth , Richard Henderson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP This fixes "make check-tcg" on a Debian x86_64 host. Signed-off-by: Stefan Weil Tested-by: Thomas Huth --- tcg/tci.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/tcg/tci.c b/tcg/tci.c index 33edca1903..a6208653e8 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -127,6 +127,12 @@ static void tci_write_reg8(tcg_target_ulong *regs, TCGReg index, uint8_t value) tci_write_reg(regs, index, value); } +static void +tci_write_reg16(tcg_target_ulong *regs, TCGReg index, uint16_t value) +{ + tci_write_reg(regs, index, value); +} + static void tci_write_reg32(tcg_target_ulong *regs, TCGReg index, uint32_t value) { @@ -585,6 +591,8 @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr) tci_write_reg8(regs, t0, *(uint8_t *)(t1 + t2)); break; case INDEX_op_ld8s_i32: + TODO(); + break; case INDEX_op_ld16u_i32: TODO(); break; @@ -854,7 +862,14 @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr) tci_write_reg8(regs, t0, *(uint8_t *)(t1 + t2)); break; case INDEX_op_ld8s_i64: + TODO(); + break; case INDEX_op_ld16u_i64: + t0 = *tb_ptr++; + t1 = tci_read_r(regs, &tb_ptr); + t2 = tci_read_s32(&tb_ptr); + tci_write_reg16(regs, t0, *(uint16_t *)(t1 + t2)); + break; case INDEX_op_ld16s_i64: TODO(); break;