From patchwork Fri Apr 26 06:06:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 10918259 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DD6B81398 for ; Fri, 26 Apr 2019 06:15:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C869528B1C for ; Fri, 26 Apr 2019 06:15:29 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B7D4F28B26; Fri, 26 Apr 2019 06:15:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.0 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4BF0328B1C for ; Fri, 26 Apr 2019 06:15:29 +0000 (UTC) Received: from localhost ([127.0.0.1]:40013 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hJu8u-0005OT-El for patchwork-qemu-devel@patchwork.kernel.org; Fri, 26 Apr 2019 02:15:28 -0400 Received: from eggs.gnu.org ([209.51.188.92]:60039) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hJu0a-0005Uk-7D for qemu-devel@nongnu.org; Fri, 26 Apr 2019 02:06:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hJu0Y-0004Tj-Lh for qemu-devel@nongnu.org; Fri, 26 Apr 2019 02:06:52 -0400 Received: from ozlabs.org ([203.11.71.1]:50607) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hJu0Y-0004Pf-8t; Fri, 26 Apr 2019 02:06:50 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 44r3Tn1NdQz9sNM; Fri, 26 Apr 2019 16:06:36 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1556258797; bh=kDfYjlvVQdJieRr+Nh8b7xVvL3ct73J87Iz8hXJMJNw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oU4uuH3gfyTgT/HGaQVCem7+8Fp+MWNxwwJ3buPOf9QQWtoqYkMeOKoKqZqdMUldZ zJnmknbxc0xz/+B4o57UcpV6kxoHViVEs5w4cFAwIbL5aJQRmX4qUl8TQL6nzN3b0B kLD2Qfv9ofeDHmx3JhqnBlc2p6dHvjafSem9qK7o= From: David Gibson To: peter.maydell@linaro.org Date: Fri, 26 Apr 2019 16:06:09 +1000 Message-Id: <20190426060627.18153-19-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190426060627.18153-1-david@gibson.dropbear.id.au> References: <20190426060627.18153-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 203.11.71.1 Subject: [Qemu-devel] [PULL 18/36] target/ppc: Style fixes for mmu-hash32.[ch] X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: gkurz@kaod.org, Greg Kurz , qemu-devel@nongnu.org, qemu-ppc@nongnu.org, clg@kaod.org, David Gibson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: David Gibson Reviewed-by: Cédric Le Goater Reviewed-by: Greg Kurz --- target/ppc/mmu-hash32.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/target/ppc/mmu-hash32.c b/target/ppc/mmu-hash32.c index e8562a7c87..3f4dee835e 100644 --- a/target/ppc/mmu-hash32.c +++ b/target/ppc/mmu-hash32.c @@ -27,7 +27,7 @@ #include "mmu-hash32.h" #include "exec/log.h" -//#define DEBUG_BAT +/* #define DEBUG_BAT */ #ifdef DEBUG_BATS # define LOG_BATS(...) qemu_log_mask(CPU_LOG_MMU, __VA_ARGS__) @@ -228,8 +228,10 @@ static int ppc_hash32_direct_store(PowerPCCPU *cpu, target_ulong sr, qemu_log_mask(CPU_LOG_MMU, "direct store...\n"); if ((sr & 0x1FF00000) >> 20 == 0x07f) { - /* Memory-forced I/O controller interface access */ - /* If T=1 and BUID=x'07F', the 601 performs a memory access + /* + * Memory-forced I/O controller interface access + * + * If T=1 and BUID=x'07F', the 601 performs a memory access * to SR[28-31] LA[4-31], bypassing all protection mechanisms. */ *raddr = ((sr & 0xF) << 28) | (eaddr & 0x0FFFFFFF); @@ -265,9 +267,11 @@ static int ppc_hash32_direct_store(PowerPCCPU *cpu, target_ulong sr, } return 1; case ACCESS_CACHE: - /* dcba, dcbt, dcbtst, dcbf, dcbi, dcbst, dcbz, or icbi */ - /* Should make the instruction do no-op. - * As it already do no-op, it's quite easy :-) + /* + * dcba, dcbt, dcbtst, dcbf, dcbi, dcbst, dcbz, or icbi + * + * Should make the instruction do no-op. As it already do + * no-op, it's quite easy :-) */ *raddr = eaddr; return 0; @@ -519,8 +523,10 @@ int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, if (rwx == 1) { new_pte1 |= HPTE32_R_C; /* set changed (dirty) bit */ } else { - /* Treat the page as read-only for now, so that a later write - * will pass through this function again to set the C bit */ + /* + * Treat the page as read-only for now, so that a later write + * will pass through this function again to set the C bit + */ prot &= ~PAGE_WRITE; }