From patchwork Mon Apr 29 09:02:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Borntraeger X-Patchwork-Id: 10921461 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EED5092A for ; Mon, 29 Apr 2019 09:09:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DD4B6285EB for ; Mon, 29 Apr 2019 09:09:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D15412863D; Mon, 29 Apr 2019 09:09:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5D457285EB for ; Mon, 29 Apr 2019 09:09:49 +0000 (UTC) Received: from localhost ([127.0.0.1]:54365 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hL2IG-0003BV-GH for patchwork-qemu-devel@patchwork.kernel.org; Mon, 29 Apr 2019 05:09:48 -0400 Received: from eggs.gnu.org ([209.51.188.92]:33382) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hL2GK-0001YM-VH for qemu-devel@nongnu.org; Mon, 29 Apr 2019 05:07:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hL2Bw-0000a0-5t for qemu-devel@nongnu.org; Mon, 29 Apr 2019 05:03:17 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:39912 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hL2Bw-0000Tl-1W for qemu-devel@nongnu.org; Mon, 29 Apr 2019 05:03:16 -0400 Received: from pps.filterd (m0098420.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x3T8reel057729 for ; Mon, 29 Apr 2019 05:03:05 -0400 Received: from e32.co.us.ibm.com (e32.co.us.ibm.com [32.97.110.150]) by mx0b-001b2d01.pphosted.com with ESMTP id 2s5w0gb6am-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Mon, 29 Apr 2019 05:03:04 -0400 Received: from localhost by e32.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Mon, 29 Apr 2019 10:03:00 +0100 Received: from b03ledav006.gho.boulder.ibm.com (b03ledav006.gho.boulder.ibm.com [9.17.130.237]) by b03cxnp07029.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x3T92wns39583860 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 29 Apr 2019 09:02:58 GMT Received: from b03ledav006.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id BC1B0C6055; Mon, 29 Apr 2019 09:02:58 +0000 (GMT) Received: from b03ledav006.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 04C51C6057; Mon, 29 Apr 2019 09:02:58 +0000 (GMT) Received: from localhost.localdomain (unknown [9.114.17.106]) by b03ledav006.gho.boulder.ibm.com (Postfix) with ESMTP; Mon, 29 Apr 2019 09:02:57 +0000 (GMT) From: Christian Borntraeger To: Cornelia Huck Date: Mon, 29 Apr 2019 05:02:49 -0400 X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190429090250.7648-1-borntraeger@de.ibm.com> References: <20190429090250.7648-1-borntraeger@de.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 19042909-0004-0000-0000-00001505303A X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00011015; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000285; SDB=6.01195994; UDB=6.00627178; IPR=6.00976844; MB=3.00026644; MTD=3.00000008; XFM=3.00000015; UTC=2019-04-29 09:03:02 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19042909-0005-0000-0000-00008B71A320 Message-Id: <20190429090250.7648-9-borntraeger@de.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-04-29_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=771 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1904290066 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH v3 8/9] s390x/cpumodel: add gen15 defintions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Jason J . Herne" , Collin Walling , David Hildenbrand , qemu-devel , Halil Pasic , qemu-s390x , Richard Henderson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP add several new features (msa9, sort, deflate, additional vector instructions, new general purpose instructions) to generation 15. Also disable csske and bpb from the default and base models >=15. This will allow to migrate gen15 machines to future machines that do not have these features. Signed-off-by: Christian Borntraeger Reviewed-by: David Hildenbrand --- target/s390x/gen-features.c | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c index 8fc2e8e72f..c346b76bdf 100644 --- a/target/s390x/gen-features.c +++ b/target/s390x/gen-features.c @@ -13,6 +13,7 @@ #include #include +#include #include "cpu_features_def.h" #define ARRAY_SIZE(array) (sizeof(array) / sizeof(array[0])) @@ -419,6 +420,10 @@ static uint16_t base_GEN14_GA1[] = { #define base_GEN14_GA2 EmptyFeat +static uint16_t base_GEN15_GA1[] = { + S390_FEAT_MISC_INSTRUCTION_EXT3, +}; + /* Full features (in order of release) * Automatically includes corresponding base features. * Full features are all features this hardware supports even if kvm/QEMU do not @@ -548,6 +553,16 @@ static uint16_t full_GEN14_GA1[] = { #define full_GEN14_GA2 EmptyFeat +static uint16_t full_GEN15_GA1[] = { + S390_FEAT_VECTOR_ENH2, + S390_FEAT_GROUP_ENH_SORT, + S390_FEAT_GROUP_DEFLATE_CONVERSION, + S390_FEAT_VECTOR_BCD_ENH, + S390_FEAT_GROUP_MSA_EXT_9, + S390_FEAT_GROUP_MSA_EXT_9_PCKMO, + S390_FEAT_ETOKEN, +}; + /* Default features (in order of release) * Automatically includes corresponding base features. * Default features are all features this version of QEMU supports for this @@ -624,6 +639,16 @@ static uint16_t default_GEN14_GA1[] = { #define default_GEN14_GA2 EmptyFeat +static uint16_t default_GEN15_GA1[] = { + S390_FEAT_VECTOR_ENH2, + S390_FEAT_GROUP_ENH_SORT, + S390_FEAT_GROUP_DEFLATE_CONVERSION, + S390_FEAT_VECTOR_BCD_ENH, + S390_FEAT_GROUP_MSA_EXT_9, + S390_FEAT_GROUP_MSA_EXT_9_PCKMO, + S390_FEAT_ETOKEN, +}; + /* QEMU (CPU model) features */ static uint16_t qemu_V2_11[] = { @@ -740,6 +765,7 @@ static CpuFeatDefSpec CpuFeatDef[] = { CPU_FEAT_INITIALIZER(GEN13_GA2), CPU_FEAT_INITIALIZER(GEN14_GA1), CPU_FEAT_INITIALIZER(GEN14_GA2), + CPU_FEAT_INITIALIZER(GEN15_GA1), }; #define FEAT_GROUP_INITIALIZER(_name) \ @@ -808,6 +834,11 @@ static void set_bits(uint64_t list[], BitSpec bits) } } +static inline void clear_bit(uint64_t list[], unsigned long nr) +{ + list[nr / 64] &= ~(1ULL << (nr % 64)); +} + static void print_feature_defs(void) { uint64_t base_feat[S390_FEAT_MAX / 64 + 1] = {}; @@ -818,6 +849,12 @@ static void print_feature_defs(void) printf("\n/* CPU model feature list data */\n"); for (i = 0; i < ARRAY_SIZE(CpuFeatDef); i++) { + /* With gen15 CSSKE and BPB are deprecated */ + if (strcmp(CpuFeatDef[i].name, "S390_FEAT_LIST_GEN15_GA1") == 0) { + clear_bit(base_feat, S390_FEAT_CONDITIONAL_SSKE); + clear_bit(default_feat, S390_FEAT_CONDITIONAL_SSKE); + clear_bit(default_feat, S390_FEAT_BPB); + } set_bits(base_feat, CpuFeatDef[i].base_bits); /* add the base to the default features */ set_bits(default_feat, CpuFeatDef[i].base_bits);