| Message ID | 20190507163416.24647-12-philmd@redhat.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | hw: Use object_initialize_child for correct reference counting | expand |
On 07/05/19 11:34, Philippe Mathieu-Daudé wrote: > The Inter Processor Interrupt is a block part of the SoC, not the > "machine" (talking about machine is borderline with the PMU, since > it is embedded into the ZynqMP SoC, but currentl QEMU doesn't > support multi-arch cores). > > Move the IPI state to the SoC state, this will simplify the review > of the next patch. > > Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> > --- > hw/microblaze/xlnx-zynqmp-pmu.c | 14 +++++++------- > 1 file changed, 7 insertions(+), 7 deletions(-) > > diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c > index 57dc1ccd429..eba9945c19b 100644 > --- a/hw/microblaze/xlnx-zynqmp-pmu.c > +++ b/hw/microblaze/xlnx-zynqmp-pmu.c > @@ -55,6 +55,7 @@ typedef struct XlnxZynqMPPMUSoCState { > /*< public >*/ > MicroBlazeCPU cpu; > XlnxPMUIOIntc intc; > + XlnxZynqMPIPI ipi[XLNX_ZYNQMP_PMU_NUM_IPIS]; > } XlnxZynqMPPMUSoCState; > > > @@ -144,7 +145,6 @@ static void xlnx_zynqmp_pmu_init(MachineState *machine) > MemoryRegion *address_space_mem = get_system_memory(); > MemoryRegion *pmu_rom = g_new(MemoryRegion, 1); > MemoryRegion *pmu_ram = g_new(MemoryRegion, 1); > - XlnxZynqMPIPI *ipi[XLNX_ZYNQMP_PMU_NUM_IPIS]; > qemu_irq irq[32]; > int i; > > @@ -172,16 +172,16 @@ static void xlnx_zynqmp_pmu_init(MachineState *machine) > > /* Create and connect the IPI device */ > for (i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) { > - ipi[i] = g_new0(XlnxZynqMPIPI, 1); > - object_initialize(ipi[i], sizeof(XlnxZynqMPIPI), TYPE_XLNX_ZYNQMP_IPI); > - qdev_set_parent_bus(DEVICE(ipi[i]), sysbus_get_default()); > + object_initialize(&pmu->ipi[i], sizeof(XlnxZynqMPIPI), > + TYPE_XLNX_ZYNQMP_IPI); > + qdev_set_parent_bus(DEVICE(&pmu->ipi[i]), sysbus_get_default()); > } > > for (i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) { > - object_property_set_bool(OBJECT(ipi[i]), true, "realized", > + object_property_set_bool(OBJECT(&pmu->ipi[i]), true, "realized", > &error_abort); > - sysbus_mmio_map(SYS_BUS_DEVICE(ipi[i]), 0, ipi_addr[i]); > - sysbus_connect_irq(SYS_BUS_DEVICE(ipi[i]), 0, irq[ipi_irq[i]]); > + sysbus_mmio_map(SYS_BUS_DEVICE(&pmu->ipi[i]), 0, ipi_addr[i]); > + sysbus_connect_irq(SYS_BUS_DEVICE(&pmu->ipi[i]), 0, irq[ipi_irq[i]]); > } > > /* Load the kernel */ > Seems to be useful for debugging too, since the XlnxZynqMPIPIs' addresses are not lost after xlnx_zynqmp_pmu_init. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
On Tue, May 7, 2019 at 9:43 AM Philippe Mathieu-Daudé <philmd@redhat.com> wrote: > > The Inter Processor Interrupt is a block part of the SoC, not the > "machine" (talking about machine is borderline with the PMU, since > it is embedded into the ZynqMP SoC, but currentl QEMU doesn't > support multi-arch cores). > > Move the IPI state to the SoC state, this will simplify the review > of the next patch. > > Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > hw/microblaze/xlnx-zynqmp-pmu.c | 14 +++++++------- > 1 file changed, 7 insertions(+), 7 deletions(-) > > diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c > index 57dc1ccd429..eba9945c19b 100644 > --- a/hw/microblaze/xlnx-zynqmp-pmu.c > +++ b/hw/microblaze/xlnx-zynqmp-pmu.c > @@ -55,6 +55,7 @@ typedef struct XlnxZynqMPPMUSoCState { > /*< public >*/ > MicroBlazeCPU cpu; > XlnxPMUIOIntc intc; > + XlnxZynqMPIPI ipi[XLNX_ZYNQMP_PMU_NUM_IPIS]; > } XlnxZynqMPPMUSoCState; > > > @@ -144,7 +145,6 @@ static void xlnx_zynqmp_pmu_init(MachineState *machine) > MemoryRegion *address_space_mem = get_system_memory(); > MemoryRegion *pmu_rom = g_new(MemoryRegion, 1); > MemoryRegion *pmu_ram = g_new(MemoryRegion, 1); > - XlnxZynqMPIPI *ipi[XLNX_ZYNQMP_PMU_NUM_IPIS]; > qemu_irq irq[32]; > int i; > > @@ -172,16 +172,16 @@ static void xlnx_zynqmp_pmu_init(MachineState *machine) > > /* Create and connect the IPI device */ > for (i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) { > - ipi[i] = g_new0(XlnxZynqMPIPI, 1); > - object_initialize(ipi[i], sizeof(XlnxZynqMPIPI), TYPE_XLNX_ZYNQMP_IPI); > - qdev_set_parent_bus(DEVICE(ipi[i]), sysbus_get_default()); > + object_initialize(&pmu->ipi[i], sizeof(XlnxZynqMPIPI), > + TYPE_XLNX_ZYNQMP_IPI); > + qdev_set_parent_bus(DEVICE(&pmu->ipi[i]), sysbus_get_default()); > } > > for (i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) { > - object_property_set_bool(OBJECT(ipi[i]), true, "realized", > + object_property_set_bool(OBJECT(&pmu->ipi[i]), true, "realized", > &error_abort); > - sysbus_mmio_map(SYS_BUS_DEVICE(ipi[i]), 0, ipi_addr[i]); > - sysbus_connect_irq(SYS_BUS_DEVICE(ipi[i]), 0, irq[ipi_irq[i]]); > + sysbus_mmio_map(SYS_BUS_DEVICE(&pmu->ipi[i]), 0, ipi_addr[i]); > + sysbus_connect_irq(SYS_BUS_DEVICE(&pmu->ipi[i]), 0, irq[ipi_irq[i]]); > } > > /* Load the kernel */ > -- > 2.20.1 > >
diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c index 57dc1ccd429..eba9945c19b 100644 --- a/hw/microblaze/xlnx-zynqmp-pmu.c +++ b/hw/microblaze/xlnx-zynqmp-pmu.c @@ -55,6 +55,7 @@ typedef struct XlnxZynqMPPMUSoCState { /*< public >*/ MicroBlazeCPU cpu; XlnxPMUIOIntc intc; + XlnxZynqMPIPI ipi[XLNX_ZYNQMP_PMU_NUM_IPIS]; } XlnxZynqMPPMUSoCState; @@ -144,7 +145,6 @@ static void xlnx_zynqmp_pmu_init(MachineState *machine) MemoryRegion *address_space_mem = get_system_memory(); MemoryRegion *pmu_rom = g_new(MemoryRegion, 1); MemoryRegion *pmu_ram = g_new(MemoryRegion, 1); - XlnxZynqMPIPI *ipi[XLNX_ZYNQMP_PMU_NUM_IPIS]; qemu_irq irq[32]; int i; @@ -172,16 +172,16 @@ static void xlnx_zynqmp_pmu_init(MachineState *machine) /* Create and connect the IPI device */ for (i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) { - ipi[i] = g_new0(XlnxZynqMPIPI, 1); - object_initialize(ipi[i], sizeof(XlnxZynqMPIPI), TYPE_XLNX_ZYNQMP_IPI); - qdev_set_parent_bus(DEVICE(ipi[i]), sysbus_get_default()); + object_initialize(&pmu->ipi[i], sizeof(XlnxZynqMPIPI), + TYPE_XLNX_ZYNQMP_IPI); + qdev_set_parent_bus(DEVICE(&pmu->ipi[i]), sysbus_get_default()); } for (i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) { - object_property_set_bool(OBJECT(ipi[i]), true, "realized", + object_property_set_bool(OBJECT(&pmu->ipi[i]), true, "realized", &error_abort); - sysbus_mmio_map(SYS_BUS_DEVICE(ipi[i]), 0, ipi_addr[i]); - sysbus_connect_irq(SYS_BUS_DEVICE(ipi[i]), 0, irq[ipi_irq[i]]); + sysbus_mmio_map(SYS_BUS_DEVICE(&pmu->ipi[i]), 0, ipi_addr[i]); + sysbus_connect_irq(SYS_BUS_DEVICE(&pmu->ipi[i]), 0, irq[ipi_irq[i]]); } /* Load the kernel */
The Inter Processor Interrupt is a block part of the SoC, not the "machine" (talking about machine is borderline with the PMU, since it is embedded into the ZynqMP SoC, but currentl QEMU doesn't support multi-arch cores). Move the IPI state to the SoC state, this will simplify the review of the next patch. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> --- hw/microblaze/xlnx-zynqmp-pmu.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)