diff mbox series

[v3,21/39] target/openrisc: Use env_cpu, env_archcpu

Message ID 20190508000641.19090-22-richard.henderson@linaro.org (mailing list archive)
State New, archived
Headers show
Series tcg: Move the softmmu tlb to CPUNegativeOffsetState | expand

Commit Message

Richard Henderson May 8, 2019, 12:06 a.m. UTC 
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/openrisc/cpu.h              | 5 -----
 linux-user/openrisc/cpu_loop.c     | 2 +-
 target/openrisc/exception_helper.c | 5 ++---
 target/openrisc/sys_helper.c       | 8 ++++----
 4 files changed, 7 insertions(+), 13 deletions(-)

Comments

Alistair Francis May 9, 2019, 6:20 p.m. UTC | #1 
On Tue, May 7, 2019 at 5:22 PM Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/openrisc/cpu.h              | 5 -----
>  linux-user/openrisc/cpu_loop.c     | 2 +-
>  target/openrisc/exception_helper.c | 5 ++---
>  target/openrisc/sys_helper.c       | 8 ++++----
>  4 files changed, 7 insertions(+), 13 deletions(-)
>
> diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
> index 0ba4ae3356..91ba667139 100644
> --- a/target/openrisc/cpu.h
> +++ b/target/openrisc/cpu.h
> @@ -317,11 +317,6 @@ typedef struct OpenRISCCPU {
>
>  } OpenRISCCPU;
>
> -static inline OpenRISCCPU *openrisc_env_get_cpu(CPUOpenRISCState *env)
> -{
> -    return container_of(env, OpenRISCCPU, env);
> -}
> -
>  #define ENV_OFFSET offsetof(OpenRISCCPU, env)
>
>  void cpu_openrisc_list(void);
> diff --git a/linux-user/openrisc/cpu_loop.c b/linux-user/openrisc/cpu_loop.c
> index f496e4b48a..4b8165b261 100644
> --- a/linux-user/openrisc/cpu_loop.c
> +++ b/linux-user/openrisc/cpu_loop.c
> @@ -23,7 +23,7 @@
>
>  void cpu_loop(CPUOpenRISCState *env)
>  {
> -    CPUState *cs = CPU(openrisc_env_get_cpu(env));
> +    CPUState *cs = env_cpu(env);
>      int trapnr;
>      abi_long ret;
>      target_siginfo_t info;
> diff --git a/target/openrisc/exception_helper.c b/target/openrisc/exception_helper.c
> index 6073a5b21c..dd639ba5f2 100644
> --- a/target/openrisc/exception_helper.c
> +++ b/target/openrisc/exception_helper.c
> @@ -25,15 +25,14 @@
>
>  void HELPER(exception)(CPUOpenRISCState *env, uint32_t excp)
>  {
> -    OpenRISCCPU *cpu = openrisc_env_get_cpu(env);
> +    OpenRISCCPU *cpu = env_archcpu(env);
>
>      raise_exception(cpu, excp);
>  }
>
>  static void QEMU_NORETURN do_range(CPUOpenRISCState *env, uintptr_t pc)
>  {
> -    OpenRISCCPU *cpu = openrisc_env_get_cpu(env);
> -    CPUState *cs = CPU(cpu);
> +    CPUState *cs = env_cpu(env);
>
>      cs->exception_index = EXCP_RANGE;
>      cpu_loop_exit_restore(cs, pc);
> diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c
> index 05f66c455b..8f11cb8202 100644
> --- a/target/openrisc/sys_helper.c
> +++ b/target/openrisc/sys_helper.c
> @@ -30,8 +30,8 @@
>  void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong spr, target_ulong rb)
>  {
>  #ifndef CONFIG_USER_ONLY
> -    OpenRISCCPU *cpu = openrisc_env_get_cpu(env);
> -    CPUState *cs = CPU(cpu);
> +    OpenRISCCPU *cpu = env_archcpu(env);
> +    CPUState *cs = env_cpu(env);
>      target_ulong mr;
>      int idx;
>
> @@ -194,8 +194,8 @@ target_ulong HELPER(mfspr)(CPUOpenRISCState *env, target_ulong rd,
>                             target_ulong spr)
>  {
>  #ifndef CONFIG_USER_ONLY
> -    OpenRISCCPU *cpu = openrisc_env_get_cpu(env);
> -    CPUState *cs = CPU(cpu);
> +    OpenRISCCPU *cpu = env_archcpu(env);
> +    CPUState *cs = env_cpu(env);
>      int idx;
>
>      switch (spr) {
> --
> 2.17.1
>
>
diff mbox series

Patch

diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h
index 0ba4ae3356..91ba667139 100644
--- a/target/openrisc/cpu.h
+++ b/target/openrisc/cpu.h
@@ -317,11 +317,6 @@  typedef struct OpenRISCCPU {
 
 } OpenRISCCPU;
 
-static inline OpenRISCCPU *openrisc_env_get_cpu(CPUOpenRISCState *env)
-{
-    return container_of(env, OpenRISCCPU, env);
-}
-
 #define ENV_OFFSET offsetof(OpenRISCCPU, env)
 
 void cpu_openrisc_list(void);
diff --git a/linux-user/openrisc/cpu_loop.c b/linux-user/openrisc/cpu_loop.c
index f496e4b48a..4b8165b261 100644
--- a/linux-user/openrisc/cpu_loop.c
+++ b/linux-user/openrisc/cpu_loop.c
@@ -23,7 +23,7 @@ 
 
 void cpu_loop(CPUOpenRISCState *env)
 {
-    CPUState *cs = CPU(openrisc_env_get_cpu(env));
+    CPUState *cs = env_cpu(env);
     int trapnr;
     abi_long ret;
     target_siginfo_t info;
diff --git a/target/openrisc/exception_helper.c b/target/openrisc/exception_helper.c
index 6073a5b21c..dd639ba5f2 100644
--- a/target/openrisc/exception_helper.c
+++ b/target/openrisc/exception_helper.c
@@ -25,15 +25,14 @@ 
 
 void HELPER(exception)(CPUOpenRISCState *env, uint32_t excp)
 {
-    OpenRISCCPU *cpu = openrisc_env_get_cpu(env);
+    OpenRISCCPU *cpu = env_archcpu(env);
 
     raise_exception(cpu, excp);
 }
 
 static void QEMU_NORETURN do_range(CPUOpenRISCState *env, uintptr_t pc)
 {
-    OpenRISCCPU *cpu = openrisc_env_get_cpu(env);
-    CPUState *cs = CPU(cpu);
+    CPUState *cs = env_cpu(env);
 
     cs->exception_index = EXCP_RANGE;
     cpu_loop_exit_restore(cs, pc);
diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c
index 05f66c455b..8f11cb8202 100644
--- a/target/openrisc/sys_helper.c
+++ b/target/openrisc/sys_helper.c
@@ -30,8 +30,8 @@ 
 void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong spr, target_ulong rb)
 {
 #ifndef CONFIG_USER_ONLY
-    OpenRISCCPU *cpu = openrisc_env_get_cpu(env);
-    CPUState *cs = CPU(cpu);
+    OpenRISCCPU *cpu = env_archcpu(env);
+    CPUState *cs = env_cpu(env);
     target_ulong mr;
     int idx;
 
@@ -194,8 +194,8 @@  target_ulong HELPER(mfspr)(CPUOpenRISCState *env, target_ulong rd,
                            target_ulong spr)
 {
 #ifndef CONFIG_USER_ONLY
-    OpenRISCCPU *cpu = openrisc_env_get_cpu(env);
-    CPUState *cs = CPU(cpu);
+    OpenRISCCPU *cpu = env_archcpu(env);
+    CPUState *cs = env_cpu(env);
     int idx;
 
     switch (spr) {