From patchwork Sun May 12 08:36:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 10939929 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4B24B13AD for ; Sun, 12 May 2019 08:40:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 37CCC1FF13 for ; Sun, 12 May 2019 08:40:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2544B201B1; Sun, 12 May 2019 08:40:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C1D011FF13 for ; Sun, 12 May 2019 08:40:02 +0000 (UTC) Received: from localhost ([127.0.0.1]:40489 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hPk1Z-00061v-To for patchwork-qemu-devel@patchwork.kernel.org; Sun, 12 May 2019 04:40:01 -0400 Received: from eggs.gnu.org ([209.51.188.92]:38413) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hPjzX-0004J8-3Y for qemu-devel@nongnu.org; Sun, 12 May 2019 04:37:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hPjzV-0003l9-Fc for qemu-devel@nongnu.org; Sun, 12 May 2019 04:37:55 -0400 Received: from mx1.redhat.com ([209.132.183.28]:48314) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hPjyv-0003SA-Vp; Sun, 12 May 2019 04:37:49 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 6F69E811DC; Sun, 12 May 2019 08:37:16 +0000 (UTC) Received: from kamzik.brq.redhat.com (ovpn-116-87.ams2.redhat.com [10.36.116.87]) by smtp.corp.redhat.com (Postfix) with ESMTP id 72C0E5D706; Sun, 12 May 2019 08:37:10 +0000 (UTC) From: Andrew Jones To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Date: Sun, 12 May 2019 10:36:20 +0200 Message-Id: <20190512083624.8916-10-drjones@redhat.com> In-Reply-To: <20190512083624.8916-1-drjones@redhat.com> References: <20190512083624.8916-1-drjones@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Sun, 12 May 2019 08:37:16 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 09/13] target/arm/kvm: Export kvm_arm_get_sve_vls X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, richard.henderson@linaro.org, armbru@redhat.com, abologna@redhat.com, alex.bennee@linaro.org, Dave.Martin@arm.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Andrew Jones --- target/arm/kvm64.c | 7 +++++-- target/arm/kvm_arm.h | 20 ++++++++++++++++++++ 2 files changed, 25 insertions(+), 2 deletions(-) diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index 0c666e405357..11c6334a7c08 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -446,7 +446,8 @@ void kvm_arm_pmu_set_irq(CPUState *cs, int irq) } } -static int kvm_arm_get_sve_vls(CPUState *cs, uint64_t sve_vls[]) +int kvm_arm_get_sve_vls(CPUState *cs, + uint64_t sve_vls[KVM_ARM64_SVE_VLS_WORDS]) { struct kvm_one_reg reg = { .id = KVM_REG_ARM64_SVE_VLS, @@ -470,7 +471,9 @@ static int kvm_arm_get_sve_vls(CPUState *cs, uint64_t sve_vls[]) return ret; } -static int kvm_arm_set_sve_vls(CPUState *cs, uint64_t sve_vls[], int max_vq) +static int kvm_arm_set_sve_vls(CPUState *cs, + uint64_t sve_vls[KVM_ARM64_SVE_VLS_WORDS], + int max_vq) { struct kvm_one_reg reg = { .id = KVM_REG_ARM64_SVE_VLS, diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h index c488ec3ab410..748ed8d54985 100644 --- a/target/arm/kvm_arm.h +++ b/target/arm/kvm_arm.h @@ -248,6 +248,26 @@ int kvm_arm_vgic_probe(void); void kvm_arm_pmu_set_irq(CPUState *cs, int irq); void kvm_arm_pmu_init(CPUState *cs); +/** + * kvm_arm_get_sve_vls + * @cs: CPUState + * @sve_vls: valid vector length bitmap + * + * Get the valid vector length bitmap. If a bit 'bit' is set + * then the host supports a vector length of (bit * 16) bytes. + * + * For example, if + * + * sve_vls[0] = 0xb and + * sve_vls[1 ... KVM_ARM64_SVE_VLS_WORDS-1] = 0, + * + * then the host supports 16, 32, and 64 byte vector lengths. + * + * Returns: the highest set bit if successful else < 0 error code + */ +int kvm_arm_get_sve_vls(CPUState *cs, + uint64_t sve_vls[KVM_ARM64_SVE_VLS_WORDS]); + #else static inline void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu)