diff --git a/target/s390x/helper.h b/target/s390x/helper.h
index 1f9f0b463b..f2743ccd97 100644
--- a/target/s390x/helper.h
+++ b/target/s390x/helper.h
@@ -236,6 +236,12 @@ DEF_HELPER_FLAGS_3(gvec_vistr32, TCG_CALL_NO_RWG, void, ptr, cptr, i32)
 DEF_HELPER_4(gvec_vistr_cc8, void, ptr, cptr, env, i32)
 DEF_HELPER_4(gvec_vistr_cc16, void, ptr, cptr, env, i32)
 DEF_HELPER_4(gvec_vistr_cc32, void, ptr, cptr, env, i32)
+DEF_HELPER_FLAGS_5(gvec_vstrc8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_5(gvec_vstrc16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
+DEF_HELPER_FLAGS_5(gvec_vstrc32, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, cptr, i32)
+DEF_HELPER_6(gvec_vstrc_cc8, void, ptr, cptr, cptr, cptr, env, i32)
+DEF_HELPER_6(gvec_vstrc_cc16, void, ptr, cptr, cptr, cptr, env, i32)
+DEF_HELPER_6(gvec_vstrc_cc32, void, ptr, cptr, cptr, cptr, env, i32)
 
 #ifndef CONFIG_USER_ONLY
 DEF_HELPER_3(servc, i32, env, i64, i64)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index b4a6b59608..a2969fab58 100644
--- a/target/s390x/insn-data.def
+++ b/target/s390x/insn-data.def
@@ -1201,6 +1201,8 @@
     F(0xe781, VFENE,   VRR_b, V,   0, 0, 0, 0, vfene, 0, IF_VEC)
 /* VECTOR ISOLATE STRING */
     F(0xe75c, VISTR,   VRR_a, V,   0, 0, 0, 0, vistr, 0, IF_VEC)
+/* VECTOR STRING RANGE COMPARE */
+    F(0xe78a, VSTRC,   VRR_d, V,   0, 0, 0, 0, vstrc, 0, IF_VEC)
 
 #ifndef CONFIG_USER_ONLY
 /* COMPARE AND SWAP AND PURGE */
diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c
index 437b416b4a..62a8d4d738 100644
--- a/target/s390x/translate_vx.inc.c
+++ b/target/s390x/translate_vx.inc.c
@@ -217,6 +217,10 @@ static void get_vec_element_ptr_i64(TCGv_ptr ptr, uint8_t reg, TCGv_i64 enr,
     tcg_gen_gvec_4_ool(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \
                        vec_full_reg_offset(v3), vec_full_reg_offset(v4), \
                        16, 16, data, fn)
+#define gen_gvec_4_ptr(v1, v2, v3, v4, ptr, data, fn) \
+    tcg_gen_gvec_4_ptr(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \
+                       vec_full_reg_offset(v3), vec_full_reg_offset(v4), \
+                       ptr, 16, 16, data, fn)
 #define gen_gvec_dup_i64(es, v1, c) \
     tcg_gen_gvec_dup_i64(es, vec_full_reg_offset(v1), 16, 16, c)
 #define gen_gvec_mov(v1, v2) \
@@ -2480,3 +2484,36 @@ static DisasJumpType op_vistr(DisasContext *s, DisasOps *o)
     }
     return DISAS_NEXT;
 }
+
+static DisasJumpType op_vstrc(DisasContext *s, DisasOps *o)
+{
+    const uint8_t es = get_field(s->fields, m5);
+    const uint8_t m6 = get_field(s->fields, m6);
+    static gen_helper_gvec_4_ptr * const cc[3] = {
+        gen_helper_gvec_vstrc_cc8,
+        gen_helper_gvec_vstrc_cc16,
+        gen_helper_gvec_vstrc_cc32,
+    };
+    static gen_helper_gvec_4 * const nocc[3] = {
+        gen_helper_gvec_vstrc8,
+        gen_helper_gvec_vstrc16,
+        gen_helper_gvec_vstrc32,
+    };
+
+    if (es > ES_32) {
+        gen_program_exception(s, PGM_SPECIFICATION);
+        return DISAS_NORETURN;
+    }
+
+    if (m6 & 1) {
+        gen_gvec_4_ptr(get_field(s->fields, v1), get_field(s->fields, v2),
+                       get_field(s->fields, v3), get_field(s->fields, v4),
+                       cpu_env, m6, cc[es]);
+        set_cc_static(s);
+    } else {
+        gen_gvec_4_ool(get_field(s->fields, v1), get_field(s->fields, v2),
+                       get_field(s->fields, v3), get_field(s->fields, v4), m6,
+                       nocc[es]);
+    }
+    return DISAS_NEXT;
+}
diff --git a/target/s390x/vec_string_helper.c b/target/s390x/vec_string_helper.c
index 2e998c21a2..6d6dbfa061 100644
--- a/target/s390x/vec_string_helper.c
+++ b/target/s390x/vec_string_helper.c
@@ -248,3 +248,111 @@ void HELPER(gvec_vistr_cc##BITS)(void *v1, const void *v2,                     \
 DEF_VISTR_CC_HELPER(8)
 DEF_VISTR_CC_HELPER(16)
 DEF_VISTR_CC_HELPER(32)
+
+#define DEF_ELEMENT_COMPARE(BITS)                                              \
+static bool element_compare##BITS(uint##BITS##_t data, uint##BITS##_t l,       \
+                                  uint##BITS##_t c)                            \
+{                                                                              \
+    const bool equal = extract32(c, BITS - 1, 1);                              \
+    const bool lower = extract32(c, BITS - 2, 1);                              \
+    const bool higher = extract32(c, BITS - 3, 1);                             \
+                                                                               \
+    if (equal && data == l) {                                                  \
+        return true;                                                           \
+    } else if (lower && data < l) {                                            \
+        return true;                                                           \
+    } else if (higher && data > l) {                                           \
+        return true;                                                           \
+    }                                                                          \
+    return false;                                                              \
+}
+DEF_ELEMENT_COMPARE(8)
+DEF_ELEMENT_COMPARE(16)
+DEF_ELEMENT_COMPARE(32)
+
+#define DEF_VSTRC(BITS)                                                        \
+static int vstrc##BITS(void *v1, const void *v2, const void *v3,               \
+                       const void *v4, uint8_t m6)                             \
+{                                                                              \
+    const bool in = extract32(m6, 3, 1);                                       \
+    const bool rt = extract32(m6, 2, 1);                                       \
+    const bool zs = extract32(m6, 1, 1);                                       \
+    S390Vector tmp = {};                                                       \
+    int first_byte = 16;                                                       \
+    int cc = 3; /* no match */                                                 \
+    int i, j;                                                                  \
+                                                                               \
+    for (i = 0; i < (128 / BITS); i++) {                                       \
+        const uint##BITS##_t data = s390_vec_read_element##BITS(v2, i);        \
+        bool any_comp = false;                                                 \
+                                                                               \
+        if (zs && !data) {                                                     \
+            if (cc == 3) {                                                     \
+                first_byte = i * (BITS / 8);                                   \
+                cc = 0; /* match for zero */                                   \
+            } else if (cc != 0) {                                              \
+                cc = 2; /* matching elements before match for zero */          \
+            }                                                                  \
+            if (!rt) {                                                         \
+                break;                                                         \
+            }                                                                  \
+        }                                                                      \
+                                                                               \
+        /* compare against every even-odd range pair */                        \
+        for (j = 0; j < (128 / BITS); j += 2) {                                \
+            const uint##BITS##_t l1 = s390_vec_read_element##BITS(v3, j);      \
+            const uint##BITS##_t c1 = s390_vec_read_element##BITS(v4, j);      \
+            const uint##BITS##_t l2 = s390_vec_read_element##BITS(v3, j + 1);  \
+            const uint##BITS##_t c2 = s390_vec_read_element##BITS(v4, j + 1);  \
+                                                                               \
+            if (element_compare##BITS(data, l1, c1) &&                         \
+                element_compare##BITS(data, l2, c2)) {                         \
+                any_comp = true;                                               \
+                break;                                                         \
+            }                                                                  \
+        }                                                                      \
+                                                                               \
+        /* invert the result if requested */                                   \
+        any_comp = in ^ any_comp;                                              \
+        if (cc == 3 && any_comp) {                                             \
+            first_byte = i * (BITS / 8);                                       \
+            cc = 1; /* matching elements, no match for zero */                 \
+            if (!zs && !rt) {                                                  \
+                break;                                                         \
+            }                                                                  \
+        }                                                                      \
+        /* indicate bit vector if requested */                                 \
+        if (rt && any_comp) {                                                  \
+            s390_vec_write_element##BITS(&tmp, i, (uint##BITS##_t)-1ull);      \
+        }                                                                      \
+    }                                                                          \
+    if (!rt) {                                                                 \
+        s390_vec_write_element8(&tmp, 7, first_byte);                          \
+    }                                                                          \
+    *(S390Vector *)v1 = tmp;                                                   \
+    return cc;                                                                 \
+}
+DEF_VSTRC(8)
+DEF_VSTRC(16)
+DEF_VSTRC(32)
+
+#define DEF_VSTRC_HELPER(BITS)                                                 \
+void HELPER(gvec_vstrc##BITS)(void *v1, const void *v2, const void *v3,        \
+                               const void *v4, uint32_t desc)                  \
+{                                                                              \
+    vstrc##BITS(v1, v2, v3, v4, simd_data(desc));                              \
+}
+DEF_VSTRC_HELPER(8)
+DEF_VSTRC_HELPER(16)
+DEF_VSTRC_HELPER(32)
+
+#define DEF_VSTRC_CC_HELPER(BITS)                                              \
+void HELPER(gvec_vstrc_cc##BITS)(void *v1, const void *v2, const void *v3,     \
+                                 const void *v4, CPUS390XState *env,           \
+                                 uint32_t desc)                                \
+{                                                                              \
+    env->cc_op = vstrc##BITS(v1, v2, v3, v4, simd_data(desc));                 \
+}
+DEF_VSTRC_CC_HELPER(8)
+DEF_VSTRC_CC_HELPER(16)
+DEF_VSTRC_CC_HELPER(32)
