diff mbox series

[v14,11/13] target/rx: Convert to CPUClass::tlb_fill

Message ID 20190517045136.3509-12-richard.henderson@linaro.org (mailing list archive)
State New, archived
Headers show
Series RX architecture support | expand

Commit Message

Richard Henderson May 17, 2019, 4:51 a.m. UTC 
The interface for tlb_fill has changed very recently.
Move the function into cpu.c so that it may be static
while assigning to the CPUClass methods.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/rx/cpu.c       | 14 ++++++++++++++
 target/rx/op_helper.c | 11 -----------
 2 files changed, 14 insertions(+), 11 deletions(-)

Comments

Philippe Mathieu-Daudé May 17, 2019, 7:26 a.m. UTC | #1 
On 5/17/19 6:51 AM, Richard Henderson wrote:
> The interface for tlb_fill has changed very recently.
> Move the function into cpu.c so that it may be static
> while assigning to the CPUClass methods.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>

> ---
>  target/rx/cpu.c       | 14 ++++++++++++++
>  target/rx/op_helper.c | 11 -----------
>  2 files changed, 14 insertions(+), 11 deletions(-)
> 
> diff --git a/target/rx/cpu.c b/target/rx/cpu.c
> index 4b96f2e463..3268077d08 100644
> --- a/target/rx/cpu.c
> +++ b/target/rx/cpu.c
> @@ -143,6 +143,19 @@ static void rx_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
>      info->print_insn = print_insn_rx;
>  }
>  
> +static bool rx_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,
> +                            MMUAccessType access_type, int mmu_idx,
> +                            bool probe, uintptr_t retaddr)
> +{
> +    uint32_t address, physical, prot;
> +
> +    /* Linear mapping */
> +    address = physical = addr & TARGET_PAGE_MASK;
> +    prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
> +    tlb_set_page(cs, address, physical, prot, mmu_idx, TARGET_PAGE_SIZE);
> +    return true;
> +}
> +
>  static void rx_cpu_init(Object *obj)
>  {
>      CPUState *cs = CPU(obj);
> @@ -177,6 +190,7 @@ static void rxcpu_class_init(ObjectClass *klass, void *data)
>      cc->get_phys_page_debug = rx_cpu_get_phys_page_debug;
>      cc->disas_set_info = rx_cpu_disas_set_info;
>      cc->tcg_initialize = rx_translate_init;
> +    cc->tlb_fill = rx_cpu_tlb_fill;
>  
>      cc->gdb_num_core_regs = 26;
>  }
> diff --git a/target/rx/op_helper.c b/target/rx/op_helper.c
> index 9a460070e9..fb7ae3c3ec 100644
> --- a/target/rx/op_helper.c
> +++ b/target/rx/op_helper.c
> @@ -468,14 +468,3 @@ void QEMU_NORETURN helper_rxbrk(CPURXState *env)
>  {
>      raise_exception(env, 0x100, 0);
>  }
> -
> -void tlb_fill(CPUState *cs, target_ulong addr, int size,
> -              MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
> -{
> -    uint32_t address, physical, prot;
> -
> -    /* Linear mapping */
> -    address = physical = addr & TARGET_PAGE_MASK;
> -    prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
> -    tlb_set_page(cs, address, physical, prot, mmu_idx, TARGET_PAGE_SIZE);
> -}
>
diff mbox series

Patch

diff --git a/target/rx/cpu.c b/target/rx/cpu.c
index 4b96f2e463..3268077d08 100644
--- a/target/rx/cpu.c
+++ b/target/rx/cpu.c
@@ -143,6 +143,19 @@  static void rx_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
     info->print_insn = print_insn_rx;
 }
 
+static bool rx_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,
+                            MMUAccessType access_type, int mmu_idx,
+                            bool probe, uintptr_t retaddr)
+{
+    uint32_t address, physical, prot;
+
+    /* Linear mapping */
+    address = physical = addr & TARGET_PAGE_MASK;
+    prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
+    tlb_set_page(cs, address, physical, prot, mmu_idx, TARGET_PAGE_SIZE);
+    return true;
+}
+
 static void rx_cpu_init(Object *obj)
 {
     CPUState *cs = CPU(obj);
@@ -177,6 +190,7 @@  static void rxcpu_class_init(ObjectClass *klass, void *data)
     cc->get_phys_page_debug = rx_cpu_get_phys_page_debug;
     cc->disas_set_info = rx_cpu_disas_set_info;
     cc->tcg_initialize = rx_translate_init;
+    cc->tlb_fill = rx_cpu_tlb_fill;
 
     cc->gdb_num_core_regs = 26;
 }
diff --git a/target/rx/op_helper.c b/target/rx/op_helper.c
index 9a460070e9..fb7ae3c3ec 100644
--- a/target/rx/op_helper.c
+++ b/target/rx/op_helper.c
@@ -468,14 +468,3 @@  void QEMU_NORETURN helper_rxbrk(CPURXState *env)
 {
     raise_exception(env, 0x100, 0);
 }
-
-void tlb_fill(CPUState *cs, target_ulong addr, int size,
-              MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
-{
-    uint32_t address, physical, prot;
-
-    /* Linear mapping */
-    address = physical = addr & TARGET_PAGE_MASK;
-    prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
-    tlb_set_page(cs, address, physical, prot, mmu_idx, TARGET_PAGE_SIZE);
-}