From patchwork Fri May 17 10:21:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 10947689 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2BEAA14C0 for ; Fri, 17 May 2019 10:36:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1AE2F26246 for ; Fri, 17 May 2019 10:36:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0F38426E3C; Fri, 17 May 2019 10:36:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9C53A26246 for ; Fri, 17 May 2019 10:36:41 +0000 (UTC) Received: from localhost ([127.0.0.1]:46012 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hRaED-0005Rd-1J for patchwork-qemu-devel@patchwork.kernel.org; Fri, 17 May 2019 06:36:41 -0400 Received: from eggs.gnu.org ([209.51.188.92]:49394) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hRa6P-0006TZ-6O for qemu-devel@nongnu.org; Fri, 17 May 2019 06:28:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hRa1s-0005Hi-2L for qemu-devel@nongnu.org; Fri, 17 May 2019 06:23:57 -0400 Received: from mx1.redhat.com ([209.132.183.28]:34762) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hRa1r-0005HK-Qp; Fri, 17 May 2019 06:23:56 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 1D8EAC09AD1F; Fri, 17 May 2019 10:23:55 +0000 (UTC) Received: from t460s.redhat.com (unknown [10.36.118.100]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9754D38E01; Fri, 17 May 2019 10:23:53 +0000 (UTC) From: David Hildenbrand To: qemu-devel@nongnu.org Date: Fri, 17 May 2019 12:21:34 +0200 Message-Id: <20190517102145.21812-30-david@redhat.com> In-Reply-To: <20190517102145.21812-1-david@redhat.com> References: <20190517102145.21812-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Fri, 17 May 2019 10:23:55 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL SUBSYSTEM s390x 29/40] s390x/tcg: Implement VECTOR SHIFT LEFT (BY BYTE) X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , David Hildenbrand , Cornelia Huck , Richard Henderson , qemu-s390x@nongnu.org, Richard Henderson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP We can reuse the existing 128-bit shift utility function. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/helper.h | 1 + target/s390x/insn-data.def | 4 ++++ target/s390x/translate_vx.inc.c | 20 ++++++++++++++++++++ target/s390x/vec_int_helper.c | 6 ++++++ 4 files changed, 31 insertions(+) diff --git a/target/s390x/helper.h b/target/s390x/helper.h index d570f763d9..b4ddc8a722 100644 --- a/target/s390x/helper.h +++ b/target/s390x/helper.h @@ -204,6 +204,7 @@ DEF_HELPER_FLAGS_4(gvec_verll8, TCG_CALL_NO_RWG, void, ptr, cptr, i64, i32) DEF_HELPER_FLAGS_4(gvec_verll16, TCG_CALL_NO_RWG, void, ptr, cptr, i64, i32) DEF_HELPER_FLAGS_4(gvec_verim8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32) DEF_HELPER_FLAGS_4(gvec_verim16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32) +DEF_HELPER_FLAGS_4(gvec_vsl, TCG_CALL_NO_RWG, void, ptr, cptr, i64, i32) #ifndef CONFIG_USER_ONLY DEF_HELPER_3(servc, i32, env, i64, i64) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index f4b67bda7e..2621e433cd 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -1160,6 +1160,10 @@ /* VECTOR ELEMENT SHIFT RIGHT LOGICAL */ F(0xe778, VESRLV, VRR_c, V, 0, 0, 0, 0, vesv, 0, IF_VEC) F(0xe738, VESRL, VRS_a, V, la2, 0, 0, 0, ves, 0, IF_VEC) +/* VECTOR SHIFT LEFT */ + F(0xe774, VSL, VRR_c, V, 0, 0, 0, 0, vsl, 0, IF_VEC) +/* VECTOR SHIFT LEFT BY BYTE */ + F(0xe775, VSLB, VRR_c, V, 0, 0, 0, 0, vsl, 0, IF_VEC) #ifndef CONFIG_USER_ONLY /* COMPARE AND SWAP AND PURGE */ diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c index 15353096c0..734c022b36 100644 --- a/target/s390x/translate_vx.inc.c +++ b/target/s390x/translate_vx.inc.c @@ -188,6 +188,9 @@ static void get_vec_element_ptr_i64(TCGv_ptr ptr, uint8_t reg, TCGv_i64 enr, #define gen_gvec_2s(v1, v2, c, gen) \ tcg_gen_gvec_2s(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \ 16, 16, c, gen) +#define gen_gvec_2i_ool(v1, v2, c, data, fn) \ + tcg_gen_gvec_2i_ool(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \ + c, 16, 16, data, fn) #define gen_gvec_3(v1, v2, v3, gen) \ tcg_gen_gvec_3(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \ vec_full_reg_offset(v3), 16, 16, gen) @@ -2040,3 +2043,20 @@ static DisasJumpType op_ves(DisasContext *s, DisasOps *o) } return DISAS_NEXT; } + +static DisasJumpType op_vsl(DisasContext *s, DisasOps *o) +{ + TCGv_i64 shift = tcg_temp_new_i64(); + + read_vec_element_i64(shift, get_field(s->fields, v3), 7, ES_8); + if (s->fields->op2 == 0x74) { + tcg_gen_andi_i64(shift, shift, 0x7); + } else { + tcg_gen_andi_i64(shift, shift, 0x78); + } + + gen_gvec_2i_ool(get_field(s->fields, v1), get_field(s->fields, v2), + shift, 0, gen_helper_gvec_vsl); + tcg_temp_free_i64(shift); + return DISAS_NEXT; +} diff --git a/target/s390x/vec_int_helper.c b/target/s390x/vec_int_helper.c index b881fb722d..3df069f033 100644 --- a/target/s390x/vec_int_helper.c +++ b/target/s390x/vec_int_helper.c @@ -529,3 +529,9 @@ void HELPER(gvec_verim##BITS)(void *v1, const void *v2, const void *v3, \ } DEF_VERIM(8) DEF_VERIM(16) + +void HELPER(gvec_vsl)(void *v1, const void *v2, uint64_t count, + uint32_t desc) +{ + s390_vec_shl(v1, v2, count); +}