From patchwork Sat May 18 23:25:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hesham Almatary X-Patchwork-Id: 10949255 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1792A76 for ; Sun, 19 May 2019 01:36:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 075152857B for ; Sun, 19 May 2019 01:36:54 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EE5EE28581; Sun, 19 May 2019 01:36:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9E02E2857B for ; Sun, 19 May 2019 01:36:53 +0000 (UTC) Received: from localhost ([127.0.0.1]:40846 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hSAku-0002jv-VV for patchwork-qemu-devel@patchwork.kernel.org; Sat, 18 May 2019 21:36:53 -0400 Received: from eggs.gnu.org ([209.51.188.92]:58369) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1hS8i8-0007Va-GN for qemu-devel@nongnu.org; Sat, 18 May 2019 19:25:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hS8i7-0004IJ-LX for qemu-devel@nongnu.org; Sat, 18 May 2019 19:25:52 -0400 Received: from mta2.cl.cam.ac.uk ([2001:630:212:200::25:2]:60013) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hS8i5-0004Gm-IB; Sat, 18 May 2019 19:25:49 -0400 Received: from cassia.cl.cam.ac.uk ([2001:630:212:238:b26e:bfff:fe2f:c7d9]) by mta2.cl.cam.ac.uk with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.86_2) (envelope-from ) id 1hS8i4-000GAu-Rl; Sun, 19 May 2019 00:25:48 +0100 Received: from hmka2 by cassia.cl.cam.ac.uk with local (Exim 4.90_1) (envelope-from ) id 1hS8i4-0001zq-Q8; Sun, 19 May 2019 00:25:48 +0100 From: Hesham Almatary To: qemu-riscv@nongnu.org Date: Sun, 19 May 2019 00:25:01 +0100 Message-Id: <20190518232502.5201-2-Hesham.Almatary@cl.cam.ac.uk> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190518232502.5201-1-Hesham.Almatary@cl.cam.ac.uk> References: <20190518232502.5201-1-Hesham.Almatary@cl.cam.ac.uk> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:630:212:200::25:2 X-Mailman-Approved-At: Sat, 18 May 2019 21:33:43 -0400 Subject: [Qemu-devel] [PATCHv2 2/3] RISC-V: Only Check PMP if MMU translation succeeds X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sagar Karandikar , Bastian Koppelmann , Palmer Dabbelt , qemu-devel@nongnu.org, Alistair Francis , Hesham Almatary Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP The current implementation unnecessarily checks for PMP even if MMU translation failed. This may trigger a wrong PMP access exception instead of a page exception. For example, the very first instruction fetched after the first satp write in S-Mode will trigger a PMP access fault instead of an instruction fetch page fault. This patch prioritises MMU exceptions over PMP exceptions and only checks for PMP if MMU translation succeeds. Signed-off-by: Hesham Almatary --- target/riscv/cpu_helper.c | 1 + 1 file changed, 1 insertion(+) -- 2.17.1 diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index b48de36114..7c7282c680 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -403,6 +403,7 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size, " prot %d\n", __func__, address, ret, pa, prot); if (riscv_feature(env, RISCV_FEATURE_PMP) && + (ret == TRANSLATE_SUCCESS) && !pmp_hart_has_privs(env, pa, TARGET_PAGE_SIZE, 1 << access_type)) { pmp_violation = true; ret = TRANSLATE_FAIL;