diff mbox series

[3/6] Improved comments on m68k_move_to/from helpers

Message ID 20190616142257.GA71205@localhost.localdomain (mailing list archive)
State New, archived
Headers show
Series target/m68k: Overhaul of MOVEC instruction to support exception/MSP | expand

Commit Message

Lucien Murray-Pitts June 16, 2019, 2:22 p.m. UTC 
Added more detailed comments to each case of m68k_move_to/from helpers to list
the supported CPUs for that CR as they were wrong in some cases, and
missing some cpu classes in other cases.

Signed-off-by: Lucien Murray-Pitts <lucienmp.qemu@gmail.com>
---
 target/m68k/helper.c | 41 +++++++++++++++++++++++++++++++----------
 1 file changed, 31 insertions(+), 10 deletions(-)

Comments

Laurent Vivier July 2, 2019, 9:44 a.m. UTC | #1 
Le 16/06/2019 à 16:22, Lucien Murray-Pitts a écrit :
> Added more detailed comments to each case of m68k_move_to/from helpers to list
> the supported CPUs for that CR as they were wrong in some cases, and
> missing some cpu classes in other cases.
> 
> Signed-off-by: Lucien Murray-Pitts <lucienmp.qemu@gmail.com>
> ---
>  target/m68k/helper.c | 41 +++++++++++++++++++++++++++++++----------
>  1 file changed, 31 insertions(+), 10 deletions(-)
> 
> diff --git a/target/m68k/helper.c b/target/m68k/helper.c
> index b0bb579403..5483ce9837 100644
> --- a/target/m68k/helper.c
> +++ b/target/m68k/helper.c

I think it would be good to add references:

/* M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
 * 1.3 SUPERVISOR PROGRAMMING MODEL
 * Table 1-1. Supervisor Registers
 *            Not Related To Paged Memory Managem
 * Table 1-2. Supervisor Registers
 *            Related To Paged Memory Management
 */

and a summary is in the movec instruction description of the same manual

/* MOVEC Move Control Register
 *      (MC68010, MC68020, MC68030, MC68040, CPU32)
*/

> @@ -197,40 +197,47 @@ void HELPER(m68k_movec_to)(CPUM68KState *env, uint32_t reg, uint32_t val)
>      M68kCPU *cpu = m68k_env_get_cpu(env);
>  
>      switch (reg) {
> -    /* MC680[1234]0 */
> +    /* MC680[12346]0 */
>      case M68K_CR_SFC:
>          env->sfc = val & 7;
>          return;
> +    /* MC680[12346]0 */
>      case M68K_CR_DFC:
>          env->dfc = val & 7;
>          return;
> +    /* MC680[12346]0 */
>      case M68K_CR_VBR:
>          env->vbr = val;
>          return;
> -    /* MC680[234]0 */
> +    /* MC680[2346]0 */
>      case M68K_CR_CACR:
>          env->cacr = val;
>          m68k_switch_sp(env);
>          return;
> -    /* MC680[34]0 */
> +    /* MC680[46]0 */

030 uses pmove to manage MMU registers (SRP, CRP, TC MMUSR and ACUSR).
For the moment, I have only implemented the 040 MMU, that's why the
instructions is not implemented.

>      case M68K_CR_TC:
>          env->mmu.tcr = val;
>          return;
> +    /* MC680[4]0 */
>      case M68K_CR_MMUSR:
>          env->mmu.mmusr = val;
>          return;
> +    /* MC680[46]0 */
>      case M68K_CR_SRP:
>          env->mmu.srp = val;
>          return;
>      case M68K_CR_URP:
>          env->mmu.urp = val;
>          return;
> +    /* MC680[46]0 */
>      case M68K_CR_USP:
>          env->sp[M68K_USP] = val;
>          return;
> +    /* MC680[234]0 */
>      case M68K_CR_MSP:
>          env->sp[M68K_SSP] = val;
>          return;
> +    /* MC680[234]0 */
>      case M68K_CR_ISP:
>          env->sp[M68K_ISP] = val;
>          return;
...

Thanks,
Laurent
diff mbox series

Patch

diff --git a/target/m68k/helper.c b/target/m68k/helper.c
index b0bb579403..5483ce9837 100644
--- a/target/m68k/helper.c
+++ b/target/m68k/helper.c
@@ -197,40 +197,47 @@  void HELPER(m68k_movec_to)(CPUM68KState *env, uint32_t reg, uint32_t val)
     M68kCPU *cpu = m68k_env_get_cpu(env);
 
     switch (reg) {
-    /* MC680[1234]0 */
+    /* MC680[12346]0 */
     case M68K_CR_SFC:
         env->sfc = val & 7;
         return;
+    /* MC680[12346]0 */
     case M68K_CR_DFC:
         env->dfc = val & 7;
         return;
+    /* MC680[12346]0 */
     case M68K_CR_VBR:
         env->vbr = val;
         return;
-    /* MC680[234]0 */
+    /* MC680[2346]0 */
     case M68K_CR_CACR:
         env->cacr = val;
         m68k_switch_sp(env);
         return;
-    /* MC680[34]0 */
+    /* MC680[46]0 */
     case M68K_CR_TC:
         env->mmu.tcr = val;
         return;
+    /* MC680[4]0 */
     case M68K_CR_MMUSR:
         env->mmu.mmusr = val;
         return;
+    /* MC680[46]0 */
     case M68K_CR_SRP:
         env->mmu.srp = val;
         return;
     case M68K_CR_URP:
         env->mmu.urp = val;
         return;
+    /* MC680[46]0 */
     case M68K_CR_USP:
         env->sp[M68K_USP] = val;
         return;
+    /* MC680[234]0 */
     case M68K_CR_MSP:
         env->sp[M68K_SSP] = val;
         return;
+    /* MC680[234]0 */
     case M68K_CR_ISP:
         env->sp[M68K_ISP] = val;
         return;
@@ -238,12 +245,15 @@  void HELPER(m68k_movec_to)(CPUM68KState *env, uint32_t reg, uint32_t val)
     case M68K_CR_ITT0:
         env->mmu.ttr[M68K_ITTR0] = val;
         return;
+    /* MC68040/MC68LC040 */
     case M68K_CR_ITT1:
          env->mmu.ttr[M68K_ITTR1] = val;
         return;
+    /* MC68040/MC68LC040 */
     case M68K_CR_DTT0:
         env->mmu.ttr[M68K_DTTR0] = val;
         return;
+    /* MC68040/MC68LC040 */
     case M68K_CR_DTT1:
         env->mmu.ttr[M68K_DTTR1] = val;
         return;
@@ -257,39 +267,50 @@  uint32_t HELPER(m68k_movec_from)(CPUM68KState *env, uint32_t reg)
     M68kCPU *cpu = m68k_env_get_cpu(env);
 
     switch (reg) {
-    /* MC680[1234]0 */
+    /* MC680[12346]0 */
     case M68K_CR_SFC:
         return env->sfc;
+    /* MC680[12346]0 */
     case M68K_CR_DFC:
         return env->dfc;
+    /* MC680[12346]0 */
     case M68K_CR_VBR:
         return env->vbr;
-    /* MC680[234]0 */
+    /* MC680[2346]0 */
     case M68K_CR_CACR:
         return env->cacr;
-    /* MC680[34]0 */
+    /* MC680[46]0 */
     case M68K_CR_TC:
         return env->mmu.tcr;
+    /* MC680[4]0 */
     case M68K_CR_MMUSR:
         return env->mmu.mmusr;
+    /* MC680[46]0 */
     case M68K_CR_SRP:
         return env->mmu.srp;
+    /* MC680[46]0 */
     case M68K_CR_USP:
         return env->sp[M68K_USP];
+    /* MC680[234]0 */
     case M68K_CR_MSP:
         return env->sp[M68K_SSP];
+    /* MC680[234]0 */
     case M68K_CR_ISP:
         return env->sp[M68K_ISP];
     /* MC68040/MC68LC040 */
     case M68K_CR_URP:
         return env->mmu.urp;
-    case M68K_CR_ITT0:
+    /* MC68040/MC68LC040 */
+    case M68K_CR_ITT0: /* MC68EC040 only: M68K_CR_IACR0 */
         return env->mmu.ttr[M68K_ITTR0];
-    case M68K_CR_ITT1:
+    /* MC68040/MC68LC040 */
+    case M68K_CR_ITT1: /* MC68EC040 only: M68K_CR_IACR1 */
         return env->mmu.ttr[M68K_ITTR1];
-    case M68K_CR_DTT0:
+    /* MC68040/MC68LC040 */
+    case M68K_CR_DTT0: /* MC68EC040 only: M68K_CR_DACR0 */
         return env->mmu.ttr[M68K_DTTR0];
-    case M68K_CR_DTT1:
+    /* MC68040/MC68LC040 */
+    case M68K_CR_DTT1: /* MC68EC040 only: M68K_CR_DACR1 */
         return env->mmu.ttr[M68K_DTTR1];
     }
     cpu_abort(CPU(cpu), "Unimplemented control register read 0x%x\n",