From patchwork Tue Jul 2 00:12:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 11027069 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id EC5C0746 for ; Tue, 2 Jul 2019 02:50:59 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CF1AA277D9 for ; Tue, 2 Jul 2019 02:50:59 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BE475279E0; Tue, 2 Jul 2019 02:50:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3BB9D277D9 for ; Tue, 2 Jul 2019 02:50:58 +0000 (UTC) Received: from localhost ([::1]:47562 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hi8sk-0005Mb-3C for patchwork-qemu-devel@patchwork.kernel.org; Mon, 01 Jul 2019 22:50:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53041) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hi6SF-0001Ke-7m for qemu-devel@nongnu.org; Mon, 01 Jul 2019 20:15:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hi6SA-000787-Cx for qemu-devel@nongnu.org; Mon, 01 Jul 2019 20:15:25 -0400 Received: from mx1.redhat.com ([209.132.183.28]:44344) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hi6Rc-0006r4-PL; Mon, 01 Jul 2019 20:14:50 -0400 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 55F4C30860DC; Tue, 2 Jul 2019 00:14:47 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-21.brq.redhat.com [10.40.204.21]) by smtp.corp.redhat.com (Postfix) with ESMTPS id CD2431001B01; Tue, 2 Jul 2019 00:14:25 +0000 (UTC) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 2 Jul 2019 02:12:56 +0200 Message-Id: <20190702001301.4768-5-philmd@redhat.com> In-Reply-To: <20190702001301.4768-1-philmd@redhat.com> References: <20190702001301.4768-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.44]); Tue, 02 Jul 2019 00:14:47 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 4/9] hw/block/pflash_cfi01: Start state machine as READY to accept commands X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , "Michael S. Tsirkin" , Max Filippov , Gerd Hoffmann , "Edgar E. Iglesias" , qemu-block@nongnu.org, Aleksandar Rikalo , =?utf-8?q?Alex_Benn=C3=A9e?= , Markus Armbruster , Laszlo Ersek , David Gibson , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Eduardo Habkost , qemu-arm@nongnu.org, Alistair Francis , John Snow , Richard Henderson , Kevin Wolf , Max Reitz , Michael Walle , qemu-ppc@nongnu.org, Wei Yang , Aleksandar Markovic , Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP When the state machine is ready to accept command, the bit 7 of the status register (SR) is set to 1. The guest polls the status register and check this bit before writting command to the internal 'Write State Machine' (WSM). Set SR.7 bit to 1 when the device is created. Reference: Read Array Flowchart "Common Flash Interface (CFI) and Command Sets" (Intel Application Note 646) Appendix B "Basic Command Set" Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: John Snow Reviewed-by: Alistair Francis --- hw/block/pflash_cfi01.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 33c77f6569..dd1dfd266b 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -764,7 +764,7 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp) } pflash_mode_read_array(pfl); - pfl->status = 0; + pfl->status = 0x80; /* WSM ready */ /* Hardcoded CFI table */ /* Standard "QRY" string */ pfl->cfi_table[0x10] = 'Q';