From patchwork Tue Jul 2 00:59:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 11027145 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DD48613B1 for ; Tue, 2 Jul 2019 03:29:41 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CA0A428623 for ; Tue, 2 Jul 2019 03:29:41 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BB4A0287E2; Tue, 2 Jul 2019 03:29:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5440628623 for ; Tue, 2 Jul 2019 03:29:41 +0000 (UTC) Received: from localhost ([::1]:47996 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hi9UC-0001nP-Ma for patchwork-qemu-devel@patchwork.kernel.org; Mon, 01 Jul 2019 23:29:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:35398) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hi7DB-0003YB-4R for qemu-devel@nongnu.org; Mon, 01 Jul 2019 21:03:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hi7D3-0003sU-BT for qemu-devel@nongnu.org; Mon, 01 Jul 2019 21:03:54 -0400 Received: from mx1.redhat.com ([209.132.183.28]:58290) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hi7CN-0001lv-54; Mon, 01 Jul 2019 21:03:36 -0400 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 378A830A7C7B; Tue, 2 Jul 2019 01:00:48 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-21.brq.redhat.com [10.40.204.21]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 6DB5E1001B33; Tue, 2 Jul 2019 01:00:44 +0000 (UTC) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Mon, 1 Jul 2019 21:59:01 -0300 Message-Id: <20190702005912.15905-17-philmd@redhat.com> In-Reply-To: <20190702005912.15905-1-philmd@redhat.com> References: <20190702005912.15905-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.42]); Tue, 02 Jul 2019 01:00:48 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 16/27] hw/block/pflash_cfi02: Hold the PRI table offset in a variable X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , Laurent Vivier , Thomas Huth , Stephen Checkoway , qemu-block@nongnu.org, Max Reitz , Alistair Francis , Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Manufacturers are allowed to move the PRI table, this is why the offset is queryable via fixed offsets 0x15/0x16. Add a variable to hold the offset, so it will be easier to later move the PRI table. Reviewed-by: Alistair Francis Message-Id: <20190627202719.17739-17-philmd@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/block/pflash_cfi02.c | 31 +++++++++++++++++-------------- 1 file changed, 17 insertions(+), 14 deletions(-) diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c index f1bac480f5..23d05a6308 100644 --- a/hw/block/pflash_cfi02.c +++ b/hw/block/pflash_cfi02.c @@ -552,6 +552,7 @@ static void pflash_cfi02_realize(DeviceState *dev, Error **errp) pfl->status = 0; /* Hardcoded CFI table (mostly from SG29 Spansion flash) */ + const uint16_t pri_ofs = 0x31; /* Standard "QRY" string */ pfl->cfi_table[0x10] = 'Q'; pfl->cfi_table[0x11] = 'R'; @@ -560,8 +561,8 @@ static void pflash_cfi02_realize(DeviceState *dev, Error **errp) pfl->cfi_table[0x13] = 0x02; pfl->cfi_table[0x14] = 0x00; /* Primary extended table address */ - pfl->cfi_table[0x15] = 0x31; - pfl->cfi_table[0x16] = 0x00; + pfl->cfi_table[0x15] = pri_ofs; + pfl->cfi_table[0x16] = pri_ofs >> 8; /* Alternate command set (none) */ pfl->cfi_table[0x17] = 0x00; pfl->cfi_table[0x18] = 0x00; @@ -609,32 +610,34 @@ static void pflash_cfi02_realize(DeviceState *dev, Error **errp) pfl->cfi_table[0x2E] = (pfl->nb_blocs - 1) >> 8; pfl->cfi_table[0x2F] = pfl->sector_len >> 8; pfl->cfi_table[0x30] = pfl->sector_len >> 16; + assert(0x30 < pri_ofs); /* Extended */ - pfl->cfi_table[0x31] = 'P'; - pfl->cfi_table[0x32] = 'R'; - pfl->cfi_table[0x33] = 'I'; + pfl->cfi_table[0x00 + pri_ofs] = 'P'; + pfl->cfi_table[0x01 + pri_ofs] = 'R'; + pfl->cfi_table[0x02 + pri_ofs] = 'I'; /* Extended version 1.0 */ - pfl->cfi_table[0x34] = '1'; - pfl->cfi_table[0x35] = '0'; + pfl->cfi_table[0x03 + pri_ofs] = '1'; + pfl->cfi_table[0x04 + pri_ofs] = '0'; /* Address sensitive unlock required. */ - pfl->cfi_table[0x36] = 0x00; + pfl->cfi_table[0x05 + pri_ofs] = 0x00; /* Erase suspend not supported. */ - pfl->cfi_table[0x37] = 0x00; + pfl->cfi_table[0x06 + pri_ofs] = 0x00; /* Sector protect not supported. */ - pfl->cfi_table[0x38] = 0x00; + pfl->cfi_table[0x07 + pri_ofs] = 0x00; /* Temporary sector unprotect not supported. */ - pfl->cfi_table[0x39] = 0x00; + pfl->cfi_table[0x08 + pri_ofs] = 0x00; /* Sector protect/unprotect scheme. */ - pfl->cfi_table[0x3a] = 0x00; + pfl->cfi_table[0x09 + pri_ofs] = 0x00; /* Simultaneous operation not supported. */ - pfl->cfi_table[0x3b] = 0x00; + pfl->cfi_table[0x0a + pri_ofs] = 0x00; /* Burst mode not supported. */ - pfl->cfi_table[0x3c] = 0x00; + pfl->cfi_table[0x0b + pri_ofs] = 0x00; + assert(0x0b + pri_ofs < ARRAY_SIZE(pfl->cfi_table)); } static Property pflash_cfi02_properties[] = {