@@ -311,6 +311,9 @@ Valid options:
--sve : enable sve floating point
--be : generate instructions in Big-Endian byte order (ppc64 only).
--x86_64 : generate 64-bit (rather than 32-bit) code. (x86 only)
+ --xfeatures {none|mmx|sse|avx} : what SIMD registers should be
+ initialized. The initialization is cumulative,
+ i.e. AVX includes both MMX and SSE. (x86 only)
--help : print this message
EOT
}
@@ -324,6 +327,7 @@ sub main()
my $sve_enabled = 0;
my $big_endian = 0;
my $is_x86_64 = 0;
+ my $xfeatures = 'none';
my ($infile, $outfile);
GetOptions( "help" => sub { usage(); exit(0); },
@@ -342,6 +346,14 @@ sub main()
"no-fp" => sub { $fp_enabled = 0; },
"sve" => sub { $sve_enabled = 1; },
"x86_64" => sub { $is_x86_64 = 1; },
+ "xfeatures=s" => sub {
+ $xfeatures = $_[1];
+ die "value for xfeatures must be one of 'none', 'mmx', 'sse', 'avx' (got '$xfeatures')\n"
+ unless ($xfeatures eq 'none'
+ || $xfeatures eq 'mmx'
+ || $xfeatures eq 'sse'
+ || $xfeatures eq 'avx');
+ },
) or return 1;
# allow "--pattern re,re" and "--pattern re --pattern re"
@pattern_re = split(/,/,join(',',@pattern_re));
@@ -377,6 +389,7 @@ sub main()
'subarch' => $full_arch[1] || '',
'bigendian' => $big_endian,
'x86_64' => $is_x86_64,
+ 'xfeatures' => $xfeatures,
);
write_test_code(\%params);
The --xfeatures option is modelled after identically-named option to RISU itself; it allows the user to specify which vector registers should be initialized, so that the test image doesn't try to access registers which may not be present at runtime. Note that it is still the user's responsibility to filter out the test instructions using these registers. Signed-off-by: Jan Bobek <jan.bobek@gmail.com> --- risugen | 13 +++++++++++++ 1 file changed, 13 insertions(+)