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[97.126.117.207]) by smtp.gmail.com with ESMTPSA id o24sm104287919pfp.135.2019.07.26.10.51.10 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Fri, 26 Jul 2019 10:51:10 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 26 Jul 2019 10:49:56 -0700 Message-Id: <20190726175032.6769-32-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190726175032.6769-1-richard.henderson@linaro.org> References: <20190726175032.6769-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::434 Subject: [Qemu-devel] [PATCH 31/67] target/arm: Convert SVC X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Richard Henderson --- target/arm/translate.c | 19 +++++++++++++------ target/arm/a32.decode | 4 ++++ 2 files changed, 17 insertions(+), 6 deletions(-) diff --git a/target/arm/translate.c b/target/arm/translate.c index 3f14e5c7f3..7ea118a795 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -9979,6 +9979,18 @@ static bool trans_BLX_i(DisasContext *s, arg_BLX_i *a) return true; } +/* + * Supervisor call + */ + +static bool trans_SVC(DisasContext *s, arg_SVC *a) +{ + gen_set_pc_im(s, s->pc); + s->svc_imm = a->imm; + s->base.is_jmp = DISAS_SWI; + return true; +} + /* * Legacy decoder. */ @@ -10243,6 +10255,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn) case 0x09: case 0xa: case 0xb: + case 0xf: /* All done in decodetree. Reach here for illegal ops. */ goto illegal_op; case 0xc: @@ -10258,12 +10271,6 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn) goto illegal_op; } break; - case 0xf: - /* swi */ - gen_set_pc_im(s, s->pc); - s->svc_imm = extract32(insn, 0, 24); - s->base.is_jmp = DISAS_SWI; - break; default: illegal_op: gen_illegal_op(s); diff --git a/target/arm/a32.decode b/target/arm/a32.decode index f0f0f50c4e..c2fb28f235 100644 --- a/target/arm/a32.decode +++ b/target/arm/a32.decode @@ -528,3 +528,7 @@ LDM ---- 100 b:1 i:1 u:1 w:1 1 rn:4 list:16 &ldst_block B .... 1010 ........................ @branch BL .... 1011 ........................ @branch + +# Supervisor call + +SVC ---- 1111 imm:24 &i