Message ID | 20190805152947.28536-10-david@redhat.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | s390x: MMU changes and extensions | expand |
On Mon, 5 Aug 2019 17:29:47 +0200 David Hildenbrand <david@redhat.com> wrote: > We now implement a bunch of new facilities we can properly indicate. > > ESOP-1/ESOP-2 handling is discussed in the PoP Chafter 3-15 > ("Suppression on Protection"). The "Basic suppression-on-protection (SOP) > facility" is a core part of z/Architecture without a facility > indication. ESOP-2 is indicated by ESOP-1 + Side-effect facility > ("ESOP-2"). Besides ESOP-2, the side-effect facility is only relevant for > the guarded-storage facility (we don't implement). > > S390_ESOP: > - We indicate DAT exeptions by setting bit 61 of the TEID (TEC) to 1 and > bit 60 to zero. We don't trigger ALCP exceptions yet. Also, we set > bit 0-51 and bit 62/63 to the right values. > S390_ACCESS_EXCEPTION_FS_INDICATION: > - The TEID (TEC) properly indicates in bit 52/53 on any access if it was > a fetch or a store > S390_SIDE_EFFECT_ACCESS_ESOP2: > - We have no side-effect accesses (esp., we don't implement the > guarded-storage faciliy), we correctly set bit 64 of the TEID (TEC) to > 0 (no side-effect). > - ESOP2: We properly set bit 56, 60, 61 in the TEID (TEC) to indicate the > type of protection. We don't trigger KCP/ALCP exceptions yet. > S390_INSTRUCTION_EXEC_PROT: > - The MMU properly detects and indicates the exception on instruction fetches > - Protected TLB entries will never get PAGE_EXEC set. > > There is no need to fake the abscence of any of the facilities - without > the facilities, some bits of the TEID (TEC) are simply unpredictable. > > As IEP was added with z14 and we currently implement a z13, add it to > the MAX model instead. Looks sane, once we get those features supported. > > Signed-off-by: David Hildenbrand <david@redhat.com> > --- > target/s390x/gen-features.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c > index 7e82f2f004..6e78d40d9a 100644 > --- a/target/s390x/gen-features.c > +++ b/target/s390x/gen-features.c > @@ -704,12 +704,16 @@ static uint16_t qemu_V4_1[] = { > }; > > static uint16_t qemu_LATEST[] = { > + S390_FEAT_ACCESS_EXCEPTION_FS_INDICATION, > + S390_FEAT_SIDE_EFFECT_ACCESS_ESOP2, > + S390_FEAT_ESOP, > }; > > /* add all new definitions before this point */ > static uint16_t qemu_MAX[] = { > /* generates a dependency warning, leave it out for now */ > S390_FEAT_MSA_EXT_5, > + S390_FEAT_INSTRUCTION_EXEC_PROT, This 'dependency warning' only refers to msa_ext_5, no? Can we make that more obvious? > }; > > /****** END FEATURE DEFS ******/
diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c index 7e82f2f004..6e78d40d9a 100644 --- a/target/s390x/gen-features.c +++ b/target/s390x/gen-features.c @@ -704,12 +704,16 @@ static uint16_t qemu_V4_1[] = { }; static uint16_t qemu_LATEST[] = { + S390_FEAT_ACCESS_EXCEPTION_FS_INDICATION, + S390_FEAT_SIDE_EFFECT_ACCESS_ESOP2, + S390_FEAT_ESOP, }; /* add all new definitions before this point */ static uint16_t qemu_MAX[] = { /* generates a dependency warning, leave it out for now */ S390_FEAT_MSA_EXT_5, + S390_FEAT_INSTRUCTION_EXEC_PROT, }; /****** END FEATURE DEFS ******/
We now implement a bunch of new facilities we can properly indicate. ESOP-1/ESOP-2 handling is discussed in the PoP Chafter 3-15 ("Suppression on Protection"). The "Basic suppression-on-protection (SOP) facility" is a core part of z/Architecture without a facility indication. ESOP-2 is indicated by ESOP-1 + Side-effect facility ("ESOP-2"). Besides ESOP-2, the side-effect facility is only relevant for the guarded-storage facility (we don't implement). S390_ESOP: - We indicate DAT exeptions by setting bit 61 of the TEID (TEC) to 1 and bit 60 to zero. We don't trigger ALCP exceptions yet. Also, we set bit 0-51 and bit 62/63 to the right values. S390_ACCESS_EXCEPTION_FS_INDICATION: - The TEID (TEC) properly indicates in bit 52/53 on any access if it was a fetch or a store S390_SIDE_EFFECT_ACCESS_ESOP2: - We have no side-effect accesses (esp., we don't implement the guarded-storage faciliy), we correctly set bit 64 of the TEID (TEC) to 0 (no side-effect). - ESOP2: We properly set bit 56, 60, 61 in the TEID (TEC) to indicate the type of protection. We don't trigger KCP/ALCP exceptions yet. S390_INSTRUCTION_EXEC_PROT: - The MMU properly detects and indicates the exception on instruction fetches - Protected TLB entries will never get PAGE_EXEC set. There is no need to fake the abscence of any of the facilities - without the facilities, some bits of the TEID (TEC) are simply unpredictable. As IEP was added with z14 and we currently implement a z13, add it to the MAX model instead. Signed-off-by: David Hildenbrand <david@redhat.com> --- target/s390x/gen-features.c | 4 ++++ 1 file changed, 4 insertions(+)