@@ -35,8 +35,6 @@ typedef void (*DeviceReset)(DeviceState *dev);
typedef void (*BusRealize)(BusState *bus, Error **errp);
typedef void (*BusUnrealize)(BusState *bus, Error **errp);
-struct VMStateDescription;
-
/**
* DeviceClass:
* @props: Properties accessing state fields.
@@ -112,7 +110,7 @@ typedef struct DeviceClass {
DeviceUnrealize unrealize;
/* device state */
- const struct VMStateDescription *vmsd;
+ const VMStateDescription *vmsd;
/* Private to qdev / bus. */
const char *bus_type;
@@ -425,7 +423,7 @@ void device_class_set_parent_unrealize(DeviceClass *dc,
DeviceUnrealize dev_unrealize,
DeviceUnrealize *parent_unrealize);
-const struct VMStateDescription *qdev_get_vmsd(DeviceState *dev);
+const VMStateDescription *qdev_get_vmsd(DeviceState *dev);
const char *qdev_fw_name(DeviceState *dev);
@@ -28,7 +28,6 @@
#define QEMU_VMSTATE_H
typedef struct VMStateInfo VMStateInfo;
-typedef struct VMStateDescription VMStateDescription;
typedef struct VMStateField VMStateField;
/* VMStateInfo allows customized migration of objects that don't fit in
@@ -101,6 +101,7 @@ typedef struct SHPCDevice SHPCDevice;
typedef struct SSIBus SSIBus;
typedef struct VirtIODevice VirtIODevice;
typedef struct Visitor Visitor;
+typedef struct VMStateDescription VMStateDescription;
/*
* Pointer types
@@ -215,7 +215,7 @@ typedef struct CPUClass {
int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
void *opaque);
- const struct VMStateDescription *vmsd;
+ const VMStateDescription *vmsd;
const char *gdb_core_xml_file;
gchar * (*gdb_arch_name)(CPUState *cpu);
const char * (*gdb_get_dynamic_xml)(CPUState *cpu, const char *xmlname);
@@ -1108,7 +1108,7 @@ bool target_words_bigendian(void);
#ifdef NEED_CPU_H
#ifdef CONFIG_SOFTMMU
-extern const struct VMStateDescription vmstate_cpu_common;
+extern const VMStateDescription vmstate_cpu_common;
#else
#define vmstate_cpu_common vmstate_dummy
#endif
@@ -277,7 +277,7 @@ struct AlphaCPU {
#ifndef CONFIG_USER_ONLY
-extern const struct VMStateDescription vmstate_alpha_cpu;
+extern const VMStateDescription vmstate_alpha_cpu;
#endif
void alpha_cpu_do_interrupt(CPUState *cpu);
@@ -922,7 +922,7 @@ void arm_cpu_post_init(Object *obj);
uint64_t arm_cpu_mp_affinity(int idx, uint8_t clustersz);
#ifndef CONFIG_USER_ONLY
-extern const struct VMStateDescription vmstate_arm_cpu;
+extern const VMStateDescription vmstate_arm_cpu;
#endif
void arm_cpu_do_interrupt(CPUState *cpu);
@@ -183,7 +183,7 @@ struct CRISCPU {
#ifndef CONFIG_USER_ONLY
-extern const struct VMStateDescription vmstate_cris_cpu;
+extern const VMStateDescription vmstate_cris_cpu;
#endif
void cris_cpu_do_interrupt(CPUState *cpu);
@@ -334,7 +334,7 @@ bool hppa_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx,
int type, hwaddr *pphys, int *pprot);
extern const MemoryRegionOps hppa_io_eir_ops;
-extern const struct VMStateDescription vmstate_hppa_cpu;
+extern const VMStateDescription vmstate_hppa_cpu;
void hppa_cpu_alarm_timer(void *);
int hppa_artype_for_page(CPUHPPAState *env, target_ulong vaddr);
#endif
@@ -1516,7 +1516,7 @@ struct X86CPU {
#ifndef CONFIG_USER_ONLY
-extern struct VMStateDescription vmstate_x86_cpu;
+extern VMStateDescription vmstate_x86_cpu;
#endif
/**
@@ -195,7 +195,7 @@ struct LM32CPU {
#ifndef CONFIG_USER_ONLY
-extern const struct VMStateDescription vmstate_lm32_cpu;
+extern const VMStateDescription vmstate_lm32_cpu;
#endif
void lm32_cpu_do_interrupt(CPUState *cpu);
@@ -148,7 +148,7 @@ hwaddr cpu_mips_translate_address(CPUMIPSState *env, target_ulong address,
#define cpu_signal_handler cpu_mips_signal_handler
#ifndef CONFIG_USER_ONLY
-extern const struct VMStateDescription vmstate_mips_cpu;
+extern const VMStateDescription vmstate_mips_cpu;
#endif
static inline bool cpu_mips_hw_interrupts_enabled(CPUMIPSState *env)
@@ -333,7 +333,7 @@ int print_insn_or1k(bfd_vma addr, disassemble_info *info);
#define cpu_signal_handler cpu_openrisc_signal_handler
#ifndef CONFIG_USER_ONLY
-extern const struct VMStateDescription vmstate_openrisc_cpu;
+extern const VMStateDescription vmstate_openrisc_cpu;
/* hw/openrisc_pic.c */
void cpu_openrisc_pic_init(OpenRISCCPU *cpu);
@@ -203,7 +203,7 @@ typedef struct PPCTimebase {
int64_t time_of_the_day_ns;
} PPCTimebase;
-extern const struct VMStateDescription vmstate_ppc_timebase;
+extern const VMStateDescription vmstate_ppc_timebase;
#define VMSTATE_PPC_TIMEBASE_V(_field, _state, _version) { \
.name = (stringify(_field)), \
@@ -1255,7 +1255,7 @@ int ppc32_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs,
int cpuid, void *opaque);
#ifndef CONFIG_USER_ONLY
void ppc_cpu_do_system_reset(CPUState *cs);
-extern const struct VMStateDescription vmstate_ppc_cpu;
+extern const VMStateDescription vmstate_ppc_cpu;
#endif
/*****************************************************************************/
@@ -163,7 +163,7 @@ struct S390CPU {
#ifndef CONFIG_USER_ONLY
-extern const struct VMStateDescription vmstate_s390_cpu;
+extern const VMStateDescription vmstate_s390_cpu;
#endif
/* distinguish between 24 bit and 31 bit addressing */
@@ -532,7 +532,7 @@ struct SPARCCPU {
#ifndef CONFIG_USER_ONLY
-extern const struct VMStateDescription vmstate_sparc_cpu;
+extern const VMStateDescription vmstate_sparc_cpu;
#endif
void sparc_cpu_do_interrupt(CPUState *cpu);