diff mbox series

[RFC,v2,15/39] target/i386: introduce function ck_cpuid

Message ID 20190810041255.6820-16-jan.bobek@gmail.com (mailing list archive)
State New, archived
Headers show
Series rewrite MMX/SSE instruction translation | expand

Commit Message

Jan Bobek Aug. 10, 2019, 4:12 a.m. UTC 
Introduce a helper function to take care of instruction CPUID checks.

Signed-off-by: Jan Bobek <jan.bobek@gmail.com>
---
 target/i386/translate.c | 45 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)

Comments

Richard Henderson Aug. 13, 2019, 5:07 a.m. UTC | #1 
On 8/10/19 5:12 AM, Jan Bobek wrote:
> +enum {
> +    CK_CPUID_MMX = 1,
> +    CK_CPUID_3DNOW,
> +    CK_CPUID_SSE,
> +    CK_CPUID_SSE2,
> +    CK_CPUID_SSE3,
> +    CK_CPUID_SSSE3,
> +    CK_CPUID_SSE4_1,
> +    CK_CPUID_SSE4_2,
> +    CK_CPUID_SSE4A,
> +    CK_CPUID_AVX,
> +    CK_CPUID_AVX2,
> +};

Name the enumeration,

> +static int ck_cpuid(CPUX86State *env, DisasContext *s, int ck_cpuid_feat)

and use it in the parameter.  Return bool and true on success.

Otherwise,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~
diff mbox series

Patch

diff --git a/target/i386/translate.c b/target/i386/translate.c
index 03b49411e5..508d584584 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -4500,6 +4500,51 @@  static void gen_sse(CPUX86State *env, DisasContext *s, int b)
 #define tcg_gen_gvec_cmpgt(vece, dofs, aofs, bofs, oprsz, maxsz)        \
     tcg_gen_gvec_cmp(TCG_COND_GT, vece, dofs, aofs, bofs, oprsz, maxsz)
 
+enum {
+    CK_CPUID_MMX = 1,
+    CK_CPUID_3DNOW,
+    CK_CPUID_SSE,
+    CK_CPUID_SSE2,
+    CK_CPUID_SSE3,
+    CK_CPUID_SSSE3,
+    CK_CPUID_SSE4_1,
+    CK_CPUID_SSE4_2,
+    CK_CPUID_SSE4A,
+    CK_CPUID_AVX,
+    CK_CPUID_AVX2,
+};
+
+static int ck_cpuid(CPUX86State *env, DisasContext *s, int ck_cpuid_feat)
+{
+    switch (ck_cpuid_feat) {
+    case CK_CPUID_MMX:
+        return !(s->cpuid_features & CPUID_MMX)
+            || !(s->cpuid_ext2_features & CPUID_EXT2_MMX);
+    case CK_CPUID_3DNOW:
+        return !(s->cpuid_ext2_features & CPUID_EXT2_3DNOW);
+    case CK_CPUID_SSE:
+        return !(s->cpuid_features & CPUID_SSE);
+    case CK_CPUID_SSE2:
+        return !(s->cpuid_features & CPUID_SSE2);
+    case CK_CPUID_SSE3:
+        return !(s->cpuid_ext_features & CPUID_EXT_SSE3);
+    case CK_CPUID_SSSE3:
+        return !(s->cpuid_ext_features & CPUID_EXT_SSSE3);
+    case CK_CPUID_SSE4_1:
+        return !(s->cpuid_ext_features & CPUID_EXT_SSE41);
+    case CK_CPUID_SSE4_2:
+        return !(s->cpuid_ext_features & CPUID_EXT_SSE42);
+    case CK_CPUID_SSE4A:
+        return !(s->cpuid_ext3_features & CPUID_EXT3_SSE4A);
+    case CK_CPUID_AVX:
+        return !(s->cpuid_ext_features & CPUID_EXT_AVX);
+    case CK_CPUID_AVX2:
+        return !(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_AVX2);
+    default:
+        g_assert_not_reached();
+    }
+}
+
 static void gen_sse_ng(CPUX86State *env, DisasContext *s, int b)
 {
     enum {