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X-Received-From: 2607:f8b0:4864:20::b43 Subject: [Qemu-devel] [RFC PATCH v4 03/75] target/i386: use dflag from DisasContext X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jan Bobek , =?utf-8?q?Alex_Benn=C3=A9e?= , Richard Henderson , Richard Henderson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" There already is a variable dflag in DisasContext, so use that one rather than the identically-named local helper variable. Suggested-by: Richard Henderson Signed-off-by: Jan Bobek --- target/i386/translate.c | 180 ++++++++++++++++++++-------------------- 1 file changed, 90 insertions(+), 90 deletions(-) diff --git a/target/i386/translate.c b/target/i386/translate.c index 9ec1c79371..7226c67d2e 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -4682,7 +4682,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) op = (b >> 3) & 7; f = (b >> 1) & 3; - ot = mo_b_d(b, dflag); + ot = mo_b_d(b, s->dflag); switch(f) { case 0: /* OP Ev, Gv */ @@ -4740,7 +4740,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) { int val; - ot = mo_b_d(b, dflag); + ot = mo_b_d(b, s->dflag); modrm = x86_ldub_code(env, s); mod = (modrm >> 6) & 3; @@ -4777,16 +4777,16 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) /**************************/ /* inc, dec, and other misc arith */ case 0x40 ... 0x47: /* inc Gv */ - ot = dflag; + ot = s->dflag; gen_inc(s, ot, OR_EAX + (b & 7), 1); break; case 0x48 ... 0x4f: /* dec Gv */ - ot = dflag; + ot = s->dflag; gen_inc(s, ot, OR_EAX + (b & 7), -1); break; case 0xf6: /* GRP3 */ case 0xf7: - ot = mo_b_d(b, dflag); + ot = mo_b_d(b, s->dflag); modrm = x86_ldub_code(env, s); mod = (modrm >> 6) & 3; @@ -5018,7 +5018,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) case 0xfe: /* GRP4 */ case 0xff: /* GRP5 */ - ot = mo_b_d(b, dflag); + ot = mo_b_d(b, s->dflag); modrm = x86_ldub_code(env, s); mod = (modrm >> 6) & 3; @@ -5032,10 +5032,10 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) /* operand size for jumps is 64 bit */ ot = MO_64; } else if (op == 3 || op == 5) { - ot = dflag != MO_16 ? MO_32 + (REX_W(s) == 1) : MO_16; + ot = s->dflag != MO_16 ? MO_32 + (REX_W(s) == 1) : MO_16; } else if (op == 6) { /* default push size is 64 bit */ - ot = mo_pushpop(s, dflag); + ot = mo_pushpop(s, s->dflag); } } if (mod != 3) { @@ -5063,7 +5063,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) break; case 2: /* call Ev */ /* XXX: optimize if memory (no 'and' is necessary) */ - if (dflag == MO_16) { + if (s->dflag == MO_16) { tcg_gen_ext16u_tl(s->T0, s->T0); } next_eip = s->pc - s->cs_base; @@ -5081,19 +5081,19 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) if (s->pe && !s->vm86) { tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0); gen_helper_lcall_protected(cpu_env, s->tmp2_i32, s->T1, - tcg_const_i32(dflag - 1), + tcg_const_i32(s->dflag - 1), tcg_const_tl(s->pc - s->cs_base)); } else { tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0); gen_helper_lcall_real(cpu_env, s->tmp2_i32, s->T1, - tcg_const_i32(dflag - 1), + tcg_const_i32(s->dflag - 1), tcg_const_i32(s->pc - s->cs_base)); } tcg_gen_ld_tl(s->tmp4, cpu_env, offsetof(CPUX86State, eip)); gen_jr(s, s->tmp4); break; case 4: /* jmp Ev */ - if (dflag == MO_16) { + if (s->dflag == MO_16) { tcg_gen_ext16u_tl(s->T0, s->T0); } gen_op_jmp_v(s->T0); @@ -5126,7 +5126,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) case 0x84: /* test Ev, Gv */ case 0x85: - ot = mo_b_d(b, dflag); + ot = mo_b_d(b, s->dflag); modrm = x86_ldub_code(env, s); reg = ((modrm >> 3) & 7) | REX_R(s); @@ -5139,7 +5139,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) case 0xa8: /* test eAX, Iv */ case 0xa9: - ot = mo_b_d(b, dflag); + ot = mo_b_d(b, s->dflag); val = insn_get(env, s, ot); gen_op_mov_v_reg(s, ot, s->T0, OR_EAX); @@ -5149,7 +5149,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) break; case 0x98: /* CWDE/CBW */ - switch (dflag) { + switch (s->dflag) { #ifdef TARGET_X86_64 case MO_64: gen_op_mov_v_reg(s, MO_32, s->T0, R_EAX); @@ -5172,7 +5172,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) } break; case 0x99: /* CDQ/CWD */ - switch (dflag) { + switch (s->dflag) { #ifdef TARGET_X86_64 case MO_64: gen_op_mov_v_reg(s, MO_64, s->T0, R_EAX); @@ -5199,7 +5199,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) case 0x1af: /* imul Gv, Ev */ case 0x69: /* imul Gv, Ev, I */ case 0x6b: - ot = dflag; + ot = s->dflag; modrm = x86_ldub_code(env, s); reg = ((modrm >> 3) & 7) | REX_R(s); if (b == 0x69) @@ -5251,7 +5251,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) break; case 0x1c0: case 0x1c1: /* xadd Ev, Gv */ - ot = mo_b_d(b, dflag); + ot = mo_b_d(b, s->dflag); modrm = x86_ldub_code(env, s); reg = ((modrm >> 3) & 7) | REX_R(s); mod = (modrm >> 6) & 3; @@ -5283,7 +5283,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) { TCGv oldv, newv, cmpv; - ot = mo_b_d(b, dflag); + ot = mo_b_d(b, s->dflag); modrm = x86_ldub_code(env, s); reg = ((modrm >> 3) & 7) | REX_R(s); mod = (modrm >> 6) & 3; @@ -5344,7 +5344,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) goto illegal_op; } #ifdef TARGET_X86_64 - if (dflag == MO_64) { + if (s->dflag == MO_64) { if (!(s->cpuid_ext_features & CPUID_EXT_CX16)) { goto illegal_op; } @@ -5384,7 +5384,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) } gen_helper_rdrand(s->T0, cpu_env); rm = (modrm & 7) | REX_B(s); - gen_op_mov_reg_v(s, dflag, rm, s->T0); + gen_op_mov_reg_v(s, s->dflag, rm, s->T0); set_cc_op(s, CC_OP_EFLAGS); if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { gen_jmp(s, s->pc - s->cs_base); @@ -5420,7 +5420,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) break; case 0x68: /* push Iv */ case 0x6a: - ot = mo_pushpop(s, dflag); + ot = mo_pushpop(s, s->dflag); if (b == 0x68) val = insn_get(env, s, ot); else @@ -5505,7 +5505,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) /* mov */ case 0x88: case 0x89: /* mov Gv, Ev */ - ot = mo_b_d(b, dflag); + ot = mo_b_d(b, s->dflag); modrm = x86_ldub_code(env, s); reg = ((modrm >> 3) & 7) | REX_R(s); @@ -5514,7 +5514,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) break; case 0xc6: case 0xc7: /* mov Ev, Iv */ - ot = mo_b_d(b, dflag); + ot = mo_b_d(b, s->dflag); modrm = x86_ldub_code(env, s); mod = (modrm >> 6) & 3; if (mod != 3) { @@ -5531,7 +5531,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) break; case 0x8a: case 0x8b: /* mov Ev, Gv */ - ot = mo_b_d(b, dflag); + ot = mo_b_d(b, s->dflag); modrm = x86_ldub_code(env, s); reg = ((modrm >> 3) & 7) | REX_R(s); @@ -5563,7 +5563,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) if (reg >= 6) goto illegal_op; gen_op_movl_T0_seg(s, reg); - ot = mod == 3 ? dflag : MO_16; + ot = mod == 3 ? s->dflag : MO_16; gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 1); break; @@ -5576,7 +5576,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) TCGMemOp s_ot; /* d_ot is the size of destination */ - d_ot = dflag; + d_ot = s->dflag; /* ot is the size of source */ ot = (b & 1) + MO_8; /* s_ot is the sign+size of source */ @@ -5627,7 +5627,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) AddressParts a = gen_lea_modrm_0(env, s, modrm); TCGv ea = gen_lea_modrm_1(s, a); gen_lea_v_seg(s, s->aflag, ea, -1, -1); - gen_op_mov_reg_v(s, dflag, reg, s->A0); + gen_op_mov_reg_v(s, s->dflag, reg, s->A0); } break; @@ -5638,7 +5638,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) { target_ulong offset_addr; - ot = mo_b_d(b, dflag); + ot = mo_b_d(b, s->dflag); switch (s->aflag) { #ifdef TARGET_X86_64 case MO_64: @@ -5676,7 +5676,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) break; case 0xb8 ... 0xbf: /* mov R, Iv */ #ifdef TARGET_X86_64 - if (dflag == MO_64) { + if (s->dflag == MO_64) { uint64_t tmp; /* 64 bit case */ tmp = x86_ldq_code(env, s); @@ -5686,7 +5686,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) } else #endif { - ot = dflag; + ot = s->dflag; val = insn_get(env, s, ot); reg = (b & 7) | REX_B(s); tcg_gen_movi_tl(s->T0, val); @@ -5696,13 +5696,13 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) case 0x91 ... 0x97: /* xchg R, EAX */ do_xchg_reg_eax: - ot = dflag; + ot = s->dflag; reg = (b & 7) | REX_B(s); rm = R_EAX; goto do_xchg_reg; case 0x86: case 0x87: /* xchg Ev, Gv */ - ot = mo_b_d(b, dflag); + ot = mo_b_d(b, s->dflag); modrm = x86_ldub_code(env, s); reg = ((modrm >> 3) & 7) | REX_R(s); mod = (modrm >> 6) & 3; @@ -5739,7 +5739,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) case 0x1b5: /* lgs Gv */ op = R_GS; do_lxx: - ot = dflag != MO_16 ? MO_32 : MO_16; + ot = s->dflag != MO_16 ? MO_32 : MO_16; modrm = x86_ldub_code(env, s); reg = ((modrm >> 3) & 7) | REX_R(s); mod = (modrm >> 6) & 3; @@ -5767,7 +5767,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) shift = 2; grp2: { - ot = mo_b_d(b, dflag); + ot = mo_b_d(b, s->dflag); modrm = x86_ldub_code(env, s); mod = (modrm >> 6) & 3; op = (modrm >> 3) & 7; @@ -5820,7 +5820,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) op = 1; shift = 0; do_shiftd: - ot = dflag; + ot = s->dflag; modrm = x86_ldub_code(env, s); mod = (modrm >> 6) & 3; rm = (modrm & 7) | REX_B(s); @@ -5982,7 +5982,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) } break; case 0x0c: /* fldenv mem */ - gen_helper_fldenv(cpu_env, s->A0, tcg_const_i32(dflag - 1)); + gen_helper_fldenv(cpu_env, s->A0, tcg_const_i32(s->dflag - 1)); break; case 0x0d: /* fldcw mem */ tcg_gen_qemu_ld_i32(s->tmp2_i32, s->A0, @@ -5990,7 +5990,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) gen_helper_fldcw(cpu_env, s->tmp2_i32); break; case 0x0e: /* fnstenv mem */ - gen_helper_fstenv(cpu_env, s->A0, tcg_const_i32(dflag - 1)); + gen_helper_fstenv(cpu_env, s->A0, tcg_const_i32(s->dflag - 1)); break; case 0x0f: /* fnstcw mem */ gen_helper_fnstcw(s->tmp2_i32, cpu_env); @@ -6005,10 +6005,10 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) gen_helper_fpop(cpu_env); break; case 0x2c: /* frstor mem */ - gen_helper_frstor(cpu_env, s->A0, tcg_const_i32(dflag - 1)); + gen_helper_frstor(cpu_env, s->A0, tcg_const_i32(s->dflag - 1)); break; case 0x2e: /* fnsave mem */ - gen_helper_fsave(cpu_env, s->A0, tcg_const_i32(dflag - 1)); + gen_helper_fsave(cpu_env, s->A0, tcg_const_i32(s->dflag - 1)); break; case 0x2f: /* fnstsw mem */ gen_helper_fnstsw(s->tmp2_i32, cpu_env); @@ -6350,7 +6350,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) case 0xa4: /* movsS */ case 0xa5: - ot = mo_b_d(b, dflag); + ot = mo_b_d(b, s->dflag); if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) { gen_repz_movs(s, ot, pc_start - s->cs_base, s->pc - s->cs_base); } else { @@ -6360,7 +6360,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) case 0xaa: /* stosS */ case 0xab: - ot = mo_b_d(b, dflag); + ot = mo_b_d(b, s->dflag); if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) { gen_repz_stos(s, ot, pc_start - s->cs_base, s->pc - s->cs_base); } else { @@ -6369,7 +6369,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) break; case 0xac: /* lodsS */ case 0xad: - ot = mo_b_d(b, dflag); + ot = mo_b_d(b, s->dflag); if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) { gen_repz_lods(s, ot, pc_start - s->cs_base, s->pc - s->cs_base); } else { @@ -6378,7 +6378,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) break; case 0xae: /* scasS */ case 0xaf: - ot = mo_b_d(b, dflag); + ot = mo_b_d(b, s->dflag); if (prefixes & PREFIX_REPNZ) { gen_repz_scas(s, ot, pc_start - s->cs_base, s->pc - s->cs_base, 1); } else if (prefixes & PREFIX_REPZ) { @@ -6390,7 +6390,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) case 0xa6: /* cmpsS */ case 0xa7: - ot = mo_b_d(b, dflag); + ot = mo_b_d(b, s->dflag); if (prefixes & PREFIX_REPNZ) { gen_repz_cmps(s, ot, pc_start - s->cs_base, s->pc - s->cs_base, 1); } else if (prefixes & PREFIX_REPZ) { @@ -6401,7 +6401,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) break; case 0x6c: /* insS */ case 0x6d: - ot = mo_b_d32(b, dflag); + ot = mo_b_d32(b, s->dflag); tcg_gen_ext16u_tl(s->T0, cpu_regs[R_EDX]); gen_check_io(s, ot, pc_start - s->cs_base, SVM_IOIO_TYPE_MASK | svm_is_rep(prefixes) | 4); @@ -6416,7 +6416,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) break; case 0x6e: /* outsS */ case 0x6f: - ot = mo_b_d32(b, dflag); + ot = mo_b_d32(b, s->dflag); tcg_gen_ext16u_tl(s->T0, cpu_regs[R_EDX]); gen_check_io(s, ot, pc_start - s->cs_base, svm_is_rep(prefixes) | 4); @@ -6435,7 +6435,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) case 0xe4: case 0xe5: - ot = mo_b_d32(b, dflag); + ot = mo_b_d32(b, s->dflag); val = x86_ldub_code(env, s); tcg_gen_movi_tl(s->T0, val); gen_check_io(s, ot, pc_start - s->cs_base, @@ -6453,7 +6453,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) break; case 0xe6: case 0xe7: - ot = mo_b_d32(b, dflag); + ot = mo_b_d32(b, s->dflag); val = x86_ldub_code(env, s); tcg_gen_movi_tl(s->T0, val); gen_check_io(s, ot, pc_start - s->cs_base, @@ -6473,7 +6473,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) break; case 0xec: case 0xed: - ot = mo_b_d32(b, dflag); + ot = mo_b_d32(b, s->dflag); tcg_gen_ext16u_tl(s->T0, cpu_regs[R_EDX]); gen_check_io(s, ot, pc_start - s->cs_base, SVM_IOIO_TYPE_MASK | svm_is_rep(prefixes)); @@ -6490,7 +6490,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) break; case 0xee: case 0xef: - ot = mo_b_d32(b, dflag); + ot = mo_b_d32(b, s->dflag); tcg_gen_ext16u_tl(s->T0, cpu_regs[R_EDX]); gen_check_io(s, ot, pc_start - s->cs_base, svm_is_rep(prefixes)); @@ -6533,21 +6533,21 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) if (s->pe && !s->vm86) { gen_update_cc_op(s); gen_jmp_im(s, pc_start - s->cs_base); - gen_helper_lret_protected(cpu_env, tcg_const_i32(dflag - 1), + gen_helper_lret_protected(cpu_env, tcg_const_i32(s->dflag - 1), tcg_const_i32(val)); } else { gen_stack_A0(s); /* pop offset */ - gen_op_ld_v(s, dflag, s->T0, s->A0); + gen_op_ld_v(s, s->dflag, s->T0, s->A0); /* NOTE: keeping EIP updated is not a problem in case of exception */ gen_op_jmp_v(s->T0); /* pop selector */ - gen_add_A0_im(s, 1 << dflag); - gen_op_ld_v(s, dflag, s->T0, s->A0); + gen_add_A0_im(s, 1 << s->dflag); + gen_op_ld_v(s, s->dflag, s->T0, s->A0); gen_op_movl_seg_T0_vm(s, R_CS); /* add stack offset */ - gen_stack_update(s, val + (2 << dflag)); + gen_stack_update(s, val + (2 << s->dflag)); } gen_eob(s); break; @@ -6558,17 +6558,17 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) gen_svm_check_intercept(s, pc_start, SVM_EXIT_IRET); if (!s->pe) { /* real mode */ - gen_helper_iret_real(cpu_env, tcg_const_i32(dflag - 1)); + gen_helper_iret_real(cpu_env, tcg_const_i32(s->dflag - 1)); set_cc_op(s, CC_OP_EFLAGS); } else if (s->vm86) { if (s->iopl != 3) { gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); } else { - gen_helper_iret_real(cpu_env, tcg_const_i32(dflag - 1)); + gen_helper_iret_real(cpu_env, tcg_const_i32(s->dflag - 1)); set_cc_op(s, CC_OP_EFLAGS); } } else { - gen_helper_iret_protected(cpu_env, tcg_const_i32(dflag - 1), + gen_helper_iret_protected(cpu_env, tcg_const_i32(s->dflag - 1), tcg_const_i32(s->pc - s->cs_base)); set_cc_op(s, CC_OP_EFLAGS); } @@ -6576,14 +6576,14 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) break; case 0xe8: /* call im */ { - if (dflag != MO_16) { + if (s->dflag != MO_16) { tval = (int32_t)insn_get(env, s, MO_32); } else { tval = (int16_t)insn_get(env, s, MO_16); } next_eip = s->pc - s->cs_base; tval += next_eip; - if (dflag == MO_16) { + if (s->dflag == MO_16) { tval &= 0xffff; } else if (!CODE64(s)) { tval &= 0xffffffff; @@ -6600,7 +6600,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) if (CODE64(s)) goto illegal_op; - ot = dflag; + ot = s->dflag; offset = insn_get(env, s, ot); selector = insn_get(env, s, MO_16); @@ -6609,13 +6609,13 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) } goto do_lcall; case 0xe9: /* jmp im */ - if (dflag != MO_16) { + if (s->dflag != MO_16) { tval = (int32_t)insn_get(env, s, MO_32); } else { tval = (int16_t)insn_get(env, s, MO_16); } tval += s->pc - s->cs_base; - if (dflag == MO_16) { + if (s->dflag == MO_16) { tval &= 0xffff; } else if (!CODE64(s)) { tval &= 0xffffffff; @@ -6629,7 +6629,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) if (CODE64(s)) goto illegal_op; - ot = dflag; + ot = s->dflag; offset = insn_get(env, s, ot); selector = insn_get(env, s, MO_16); @@ -6640,7 +6640,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) case 0xeb: /* jmp Jb */ tval = (int8_t)insn_get(env, s, MO_8); tval += s->pc - s->cs_base; - if (dflag == MO_16) { + if (s->dflag == MO_16) { tval &= 0xffff; } gen_jmp(s, tval); @@ -6649,7 +6649,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) tval = (int8_t)insn_get(env, s, MO_8); goto do_jcc; case 0x180 ... 0x18f: /* jcc Jv */ - if (dflag != MO_16) { + if (s->dflag != MO_16) { tval = (int32_t)insn_get(env, s, MO_32); } else { tval = (int16_t)insn_get(env, s, MO_16); @@ -6657,7 +6657,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) do_jcc: next_eip = s->pc - s->cs_base; tval += next_eip; - if (dflag == MO_16) { + if (s->dflag == MO_16) { tval &= 0xffff; } gen_bnd_jmp(s); @@ -6673,7 +6673,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) if (!(s->cpuid_features & CPUID_CMOV)) { goto illegal_op; } - ot = dflag; + ot = s->dflag; modrm = x86_ldub_code(env, s); reg = ((modrm >> 3) & 7) | REX_R(s); gen_cmovcc1(env, s, ot, b, modrm, reg); @@ -6698,7 +6698,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) } else { ot = gen_pop_T0(s); if (s->cpl == 0) { - if (dflag != MO_16) { + if (s->dflag != MO_16) { gen_helper_write_eflags(cpu_env, s->T0, tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK | @@ -6713,7 +6713,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) } } else { if (s->cpl <= s->iopl) { - if (dflag != MO_16) { + if (s->dflag != MO_16) { gen_helper_write_eflags(cpu_env, s->T0, tcg_const_i32((TF_MASK | AC_MASK | @@ -6730,7 +6730,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) & 0xffff)); } } else { - if (dflag != MO_16) { + if (s->dflag != MO_16) { gen_helper_write_eflags(cpu_env, s->T0, tcg_const_i32((TF_MASK | AC_MASK | ID_MASK | NT_MASK))); @@ -6790,7 +6790,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) /************************/ /* bit operations */ case 0x1ba: /* bt/bts/btr/btc Gv, im */ - ot = dflag; + ot = s->dflag; modrm = x86_ldub_code(env, s); op = (modrm >> 3) & 7; mod = (modrm >> 6) & 3; @@ -6823,7 +6823,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) case 0x1bb: /* btc */ op = 3; do_btx: - ot = dflag; + ot = s->dflag; modrm = x86_ldub_code(env, s); reg = ((modrm >> 3) & 7) | REX_R(s); mod = (modrm >> 6) & 3; @@ -6928,7 +6928,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) break; case 0x1bc: /* bsf / tzcnt */ case 0x1bd: /* bsr / lzcnt */ - ot = dflag; + ot = s->dflag; modrm = x86_ldub_code(env, s); reg = ((modrm >> 3) & 7) | REX_R(s); gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0); @@ -7102,7 +7102,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) case 0x62: /* bound */ if (CODE64(s)) goto illegal_op; - ot = dflag; + ot = s->dflag; modrm = x86_ldub_code(env, s); reg = (modrm >> 3) & 7; mod = (modrm >> 6) & 3; @@ -7120,7 +7120,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) case 0x1c8 ... 0x1cf: /* bswap reg */ reg = (b & 7) | REX_B(s); #ifdef TARGET_X86_64 - if (dflag == MO_64) { + if (s->dflag == MO_64) { gen_op_mov_v_reg(s, MO_64, s->T0, reg); tcg_gen_bswap64_i64(s->T0, s->T0); gen_op_mov_reg_v(s, MO_64, reg, s->T0); @@ -7150,7 +7150,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) tval = (int8_t)insn_get(env, s, MO_8); next_eip = s->pc - s->cs_base; tval += next_eip; - if (dflag == MO_16) { + if (s->dflag == MO_16) { tval &= 0xffff; } @@ -7233,7 +7233,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) if (!s->pe) { gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); } else { - gen_helper_sysexit(cpu_env, tcg_const_i32(dflag - 1)); + gen_helper_sysexit(cpu_env, tcg_const_i32(s->dflag - 1)); gen_eob(s); } break; @@ -7252,7 +7252,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) if (!s->pe) { gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); } else { - gen_helper_sysret(cpu_env, tcg_const_i32(dflag - 1)); + gen_helper_sysret(cpu_env, tcg_const_i32(s->dflag - 1)); /* condition codes are modified only in long mode */ if (s->lma) { set_cc_op(s, CC_OP_EFLAGS); @@ -7291,7 +7291,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) gen_svm_check_intercept(s, pc_start, SVM_EXIT_LDTR_READ); tcg_gen_ld32u_tl(s->T0, cpu_env, offsetof(CPUX86State, ldt.selector)); - ot = mod == 3 ? dflag : MO_16; + ot = mod == 3 ? s->dflag : MO_16; gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 1); break; case 2: /* lldt */ @@ -7312,7 +7312,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) gen_svm_check_intercept(s, pc_start, SVM_EXIT_TR_READ); tcg_gen_ld32u_tl(s->T0, cpu_env, offsetof(CPUX86State, tr.selector)); - ot = mod == 3 ? dflag : MO_16; + ot = mod == 3 ? s->dflag : MO_16; gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 1); break; case 3: /* ltr */ @@ -7356,7 +7356,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) gen_op_st_v(s, MO_16, s->T0, s->A0); gen_add_A0_im(s, 2); tcg_gen_ld_tl(s->T0, cpu_env, offsetof(CPUX86State, gdt.base)); - if (dflag == MO_16) { + if (s->dflag == MO_16) { tcg_gen_andi_tl(s->T0, s->T0, 0xffffff); } gen_op_st_v(s, CODE64(s) + MO_32, s->T0, s->A0); @@ -7411,7 +7411,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) gen_op_st_v(s, MO_16, s->T0, s->A0); gen_add_A0_im(s, 2); tcg_gen_ld_tl(s->T0, cpu_env, offsetof(CPUX86State, idt.base)); - if (dflag == MO_16) { + if (s->dflag == MO_16) { tcg_gen_andi_tl(s->T0, s->T0, 0xffffff); } gen_op_st_v(s, CODE64(s) + MO_32, s->T0, s->A0); @@ -7561,7 +7561,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) gen_op_ld_v(s, MO_16, s->T1, s->A0); gen_add_A0_im(s, 2); gen_op_ld_v(s, CODE64(s) + MO_32, s->T0, s->A0); - if (dflag == MO_16) { + if (s->dflag == MO_16) { tcg_gen_andi_tl(s->T0, s->T0, 0xffffff); } tcg_gen_st_tl(s->T0, cpu_env, offsetof(CPUX86State, gdt.base)); @@ -7578,7 +7578,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) gen_op_ld_v(s, MO_16, s->T1, s->A0); gen_add_A0_im(s, 2); gen_op_ld_v(s, CODE64(s) + MO_32, s->T0, s->A0); - if (dflag == MO_16) { + if (s->dflag == MO_16) { tcg_gen_andi_tl(s->T0, s->T0, 0xffffff); } tcg_gen_st_tl(s->T0, cpu_env, offsetof(CPUX86State, idt.base)); @@ -7689,7 +7689,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) if (CODE64(s)) { int d_ot; /* d_ot is the size of destination */ - d_ot = dflag; + d_ot = s->dflag; modrm = x86_ldub_code(env, s); reg = ((modrm >> 3) & 7) | REX_R(s); @@ -7764,7 +7764,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) TCGv t0; if (!s->pe || s->vm86) goto illegal_op; - ot = dflag != MO_16 ? MO_32 : MO_16; + ot = s->dflag != MO_16 ? MO_32 : MO_16; modrm = x86_ldub_code(env, s); reg = ((modrm >> 3) & 7) | REX_R(s); gen_ldst_modrm(env, s, modrm, MO_16, OR_TMP0, 0); @@ -8103,7 +8103,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) case 0x1c3: /* MOVNTI reg, mem */ if (!(s->cpuid_features & CPUID_SSE2)) goto illegal_op; - ot = mo_64_32(dflag); + ot = mo_64_32(s->dflag); modrm = x86_ldub_code(env, s); mod = (modrm >> 6) & 3; if (mod == 3) @@ -8339,7 +8339,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) if (s->prefix & PREFIX_DATA) { ot = MO_16; } else { - ot = mo_64_32(dflag); + ot = mo_64_32(s->dflag); } gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0);