| Message ID | 20191018172219.10039-3-clg@kaod.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | spapr: interrupt presenter fixes | expand |
On Fri, 18 Oct 2019 19:22:19 +0200 Cédric Le Goater <clg@kaod.org> wrote: > When a Virtual Processor is scheduled to run on a HW thread, the > hypervisor pushes its identifier in the OS CAM line. When running with > kernel_irqchip=off, QEMU needs to emulate the same behavior. > > Set the OS CAM line when the interrupt presenter of the sPAPR core is > reseted. This will also cover the case of hot-plugged CPUs. > > This change also has the benefit to remove the use of CPU_FOREACH() > which can be unsafe. > Yeah, CPU_FOREACH() can bite hard... it's easy as 1-2-3 to crash QEMU with the ones in xics_spapr_print_info() and spapr_xive_print_info(). I'll post fixes soon. > Signed-off-by: Cédric Le Goater <clg@kaod.org> > --- Reviewed-by: Greg Kurz <groug@kaod.org> > include/hw/ppc/spapr_xive.h | 1 - > hw/intc/spapr_xive.c | 18 +++--------------- > 2 files changed, 3 insertions(+), 16 deletions(-) > > diff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h > index d84bd5c229f0..742b7e834f2a 100644 > --- a/include/hw/ppc/spapr_xive.h > +++ b/include/hw/ppc/spapr_xive.h > @@ -57,7 +57,6 @@ typedef struct SpaprXive { > void spapr_xive_pic_print_info(SpaprXive *xive, Monitor *mon); > > void spapr_xive_hcall_init(SpaprMachineState *spapr); > -void spapr_xive_set_tctx_os_cam(XiveTCTX *tctx); > void spapr_xive_mmio_set_enabled(SpaprXive *xive, bool enable); > void spapr_xive_map_mmio(SpaprXive *xive); > > diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c > index 258b1c5fb5ff..4f584e582b6c 100644 > --- a/hw/intc/spapr_xive.c > +++ b/hw/intc/spapr_xive.c > @@ -210,7 +210,7 @@ void spapr_xive_mmio_set_enabled(SpaprXive *xive, bool enable) > * hypervisor pushes its identifier in the OS CAM line. Emulate the > * same behavior under QEMU. > */ > -void spapr_xive_set_tctx_os_cam(XiveTCTX *tctx) > +static void spapr_xive_set_tctx_os_cam(XiveTCTX *tctx) > { > uint8_t nvt_blk; > uint32_t nvt_idx; > @@ -544,12 +544,6 @@ static int spapr_xive_cpu_intc_create(SpaprInterruptController *intc, > } > > spapr_cpu->tctx = XIVE_TCTX(obj); > - > - /* > - * (TCG) Early setting the OS CAM line for hotplugged CPUs as they > - * don't beneficiate from the reset of the XIVE IRQ backend > - */ > - spapr_xive_set_tctx_os_cam(spapr_cpu->tctx); > return 0; > } > > @@ -557,6 +551,8 @@ static void spapr_xive_cpu_intc_reset(SpaprInterruptController *intc, > PowerPCCPU *cpu) > { > xive_tctx_reset(spapr_cpu_state(cpu)->tctx); > + > + spapr_xive_set_tctx_os_cam(spapr_cpu_state(cpu)->tctx); > } > > static void spapr_xive_set_irq(SpaprInterruptController *intc, int irq, int val) > @@ -649,14 +645,6 @@ static void spapr_xive_dt(SpaprInterruptController *intc, uint32_t nr_servers, > static int spapr_xive_activate(SpaprInterruptController *intc, Error **errp) > { > SpaprXive *xive = SPAPR_XIVE(intc); > - CPUState *cs; > - > - CPU_FOREACH(cs) { > - PowerPCCPU *cpu = POWERPC_CPU(cs); > - > - /* (TCG) Set the OS CAM line of the thread interrupt context. */ > - spapr_xive_set_tctx_os_cam(spapr_cpu_state(cpu)->tctx); > - } > > if (kvm_enabled()) { > int rc = spapr_irq_init_kvm(kvmppc_xive_connect, intc, errp);
diff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h index d84bd5c229f0..742b7e834f2a 100644 --- a/include/hw/ppc/spapr_xive.h +++ b/include/hw/ppc/spapr_xive.h @@ -57,7 +57,6 @@ typedef struct SpaprXive { void spapr_xive_pic_print_info(SpaprXive *xive, Monitor *mon); void spapr_xive_hcall_init(SpaprMachineState *spapr); -void spapr_xive_set_tctx_os_cam(XiveTCTX *tctx); void spapr_xive_mmio_set_enabled(SpaprXive *xive, bool enable); void spapr_xive_map_mmio(SpaprXive *xive); diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index 258b1c5fb5ff..4f584e582b6c 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -210,7 +210,7 @@ void spapr_xive_mmio_set_enabled(SpaprXive *xive, bool enable) * hypervisor pushes its identifier in the OS CAM line. Emulate the * same behavior under QEMU. */ -void spapr_xive_set_tctx_os_cam(XiveTCTX *tctx) +static void spapr_xive_set_tctx_os_cam(XiveTCTX *tctx) { uint8_t nvt_blk; uint32_t nvt_idx; @@ -544,12 +544,6 @@ static int spapr_xive_cpu_intc_create(SpaprInterruptController *intc, } spapr_cpu->tctx = XIVE_TCTX(obj); - - /* - * (TCG) Early setting the OS CAM line for hotplugged CPUs as they - * don't beneficiate from the reset of the XIVE IRQ backend - */ - spapr_xive_set_tctx_os_cam(spapr_cpu->tctx); return 0; } @@ -557,6 +551,8 @@ static void spapr_xive_cpu_intc_reset(SpaprInterruptController *intc, PowerPCCPU *cpu) { xive_tctx_reset(spapr_cpu_state(cpu)->tctx); + + spapr_xive_set_tctx_os_cam(spapr_cpu_state(cpu)->tctx); } static void spapr_xive_set_irq(SpaprInterruptController *intc, int irq, int val) @@ -649,14 +645,6 @@ static void spapr_xive_dt(SpaprInterruptController *intc, uint32_t nr_servers, static int spapr_xive_activate(SpaprInterruptController *intc, Error **errp) { SpaprXive *xive = SPAPR_XIVE(intc); - CPUState *cs; - - CPU_FOREACH(cs) { - PowerPCCPU *cpu = POWERPC_CPU(cs); - - /* (TCG) Set the OS CAM line of the thread interrupt context. */ - spapr_xive_set_tctx_os_cam(spapr_cpu_state(cpu)->tctx); - } if (kvm_enabled()) { int rc = spapr_irq_init_kvm(kvmppc_xive_connect, intc, errp);
When a Virtual Processor is scheduled to run on a HW thread, the hypervisor pushes its identifier in the OS CAM line. When running with kernel_irqchip=off, QEMU needs to emulate the same behavior. Set the OS CAM line when the interrupt presenter of the sPAPR core is reseted. This will also cover the case of hot-plugged CPUs. This change also has the benefit to remove the use of CPU_FOREACH() which can be unsafe. Signed-off-by: Cédric Le Goater <clg@kaod.org> --- include/hw/ppc/spapr_xive.h | 1 - hw/intc/spapr_xive.c | 18 +++--------------- 2 files changed, 3 insertions(+), 16 deletions(-)