From patchwork Sun Oct 20 22:56:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 11201143 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AF860139A for ; Sun, 20 Oct 2019 23:08:24 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8548E20700 for ; Sun, 20 Oct 2019 23:08:24 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="XtfDOisJ" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8548E20700 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:51208 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iMKJD-0000OM-3u for patchwork-qemu-devel@patchwork.kernel.org; Sun, 20 Oct 2019 19:08:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34774) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iMKB2-0001Az-TM for qemu-devel@nongnu.org; Sun, 20 Oct 2019 18:59:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iMKB1-0001Gw-Bn for qemu-devel@nongnu.org; Sun, 20 Oct 2019 18:59:56 -0400 Received: from us-smtp-1.mimecast.com ([207.211.31.81]:34904 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iMKB1-0001Fw-87 for qemu-devel@nongnu.org; Sun, 20 Oct 2019 18:59:55 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1571612394; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=OSzxhfBjRtdS3tYnNag/BhLYbc88B8grh2N4vY+Fq+o=; b=XtfDOisJv3Uck5klKxCEXzxStcmyBzW02vsuVw3wpRh22h51hLveH0FAEXyfdbOlLBnbgH Jo2WRitLON9+Os398XYrThohg0Ov0lCSv9lJM8RIX+q0S7LOSbjJ4Yo5hOj0J6SgYhCWr2 aXVohYEWChUfX3VYuUx76R4WxW5dy4Q= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-177-aywJjEjxOyyn1SNA9RuIhw-1; Sun, 20 Oct 2019 18:59:53 -0400 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 5A78A80183E; Sun, 20 Oct 2019 22:59:49 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-40.brq.redhat.com [10.40.204.40]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 0BB1360C18; Sun, 20 Oct 2019 22:59:29 +0000 (UTC) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: Paolo Bonzini , Igor Mammedov , qemu-devel@nongnu.org, Markus Armbruster , Eduardo Habkost Subject: [PATCH 08/21] hw/alpha/dp264: Create the RAM in the board Date: Mon, 21 Oct 2019 00:56:37 +0200 Message-Id: <20191020225650.3671-9-philmd@redhat.com> In-Reply-To: <20191020225650.3671-1-philmd@redhat.com> References: <20191020225650.3671-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-MC-Unique: aywJjEjxOyyn1SNA9RuIhw-1 X-Mimecast-Spam-Score: 0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 207.211.31.81 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paul Burton , Peter Maydell , "Michael S. Tsirkin" , Leif Lindholm , Mark Cave-Ayland , KONRAD Frederic , "Edgar E. Iglesias" , Rob Herring , Andrey Smirnov , Helge Deller , =?utf-8?q?Herv=C3=A9_Poussineau?= , Joel Stanley , Aleksandar Rikalo , Richard Henderson , Artyom Tarasenko , Antony Pavlov , Alistair Francis , Fabien Chouteau , Beniamino Galvani , qemu-arm@nongnu.org, Peter Chubb , =?utf-8?q?C=C3=A9dric_Le_Goater?= , David Gibson , Radoslaw Biernacki , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Andrew Baumann , Jean-Christophe Dubois , Andrew Jeffery , Michael Walle , qemu-ppc@nongnu.org, Aleksandar Markovic , Jan Kiszka , Aurelien Jarno Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" The SDRAM is incorrectly created in the Tyohoon northbridge ASIC. Move its creation in the board code, this will later allow the board to have the QOM ownership of the RAM. Signed-off-by: Philippe Mathieu-Daudé --- checkpatch complains: ERROR: spaces required around that '*' (ctx:WxV) #10: FILE: hw/alpha/alpha_sys.h:13: +PCIBus *typhoon_init(ISABus **, qemu_irq *, AlphaCPU *[4], ^ --- hw/alpha/alpha_sys.h | 2 +- hw/alpha/dp264.c | 11 ++++++++++- hw/alpha/typhoon.c | 9 +-------- 3 files changed, 12 insertions(+), 10 deletions(-) diff --git a/hw/alpha/alpha_sys.h b/hw/alpha/alpha_sys.h index 4e127a6de8..17f97e1bfe 100644 --- a/hw/alpha/alpha_sys.h +++ b/hw/alpha/alpha_sys.h @@ -10,7 +10,7 @@ #include "hw/i386/pc.h" -PCIBus *typhoon_init(ram_addr_t, ISABus **, qemu_irq *, AlphaCPU *[4], +PCIBus *typhoon_init(ISABus **, qemu_irq *, AlphaCPU *[4], pci_map_irq_fn); /* alpha_pci.c. */ diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c index 51feee8558..ddc249261c 100644 --- a/hw/alpha/dp264.c +++ b/hw/alpha/dp264.c @@ -62,6 +62,7 @@ static void clipper_init(MachineState *machine) uint64_t palcode_entry, palcode_low, palcode_high; uint64_t kernel_entry, kernel_low, kernel_high; unsigned int smp_cpus = machine->smp.cpus; + MemoryRegion ram_region; /* Create up to 4 cpus. */ memset(cpus, 0, sizeof(cpus)); @@ -73,8 +74,16 @@ static void clipper_init(MachineState *machine) cpus[0]->env.trap_arg1 = 0; cpus[0]->env.trap_arg2 = smp_cpus; + /* + * Main memory region, 0x00.0000.0000. Real hardware supports 32GB, + * but the address space hole reserved at this point is 8TB. + */ + memory_region_allocate_system_memory(&ram_region, NULL, "ram", + ram_size); + memory_region_add_subregion(get_system_memory(), 0, &ram_region); + /* Init the chipset. */ - pci_bus = typhoon_init(ram_size, &isa_bus, &rtc_irq, cpus, + pci_bus = typhoon_init(&isa_bus, &rtc_irq, cpus, clipper_pci_map_irq); /* Since we have an SRM-compatible PALcode, use the SRM epoch. */ diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index 8489ec335c..12589ef331 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -58,7 +58,6 @@ typedef struct TyphoonState { TyphoonCchip cchip; TyphoonPchip pchip; MemoryRegion dchip_region; - MemoryRegion ram_region; } TyphoonState; /* Called when one of DRIR or DIM changes. */ @@ -817,7 +816,7 @@ static void typhoon_alarm_timer(void *opaque) cpu_interrupt(CPU(s->cchip.cpu[cpu]), CPU_INTERRUPT_TIMER); } -PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus, +PCIBus *typhoon_init(ISABus **isa_bus, qemu_irq *p_rtc_irq, AlphaCPU *cpus[4], pci_map_irq_fn sys_map_irq) { @@ -849,12 +848,6 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus, *p_rtc_irq = qemu_allocate_irq(typhoon_set_timer_irq, s, 0); - /* Main memory region, 0x00.0000.0000. Real hardware supports 32GB, - but the address space hole reserved at this point is 8TB. */ - memory_region_allocate_system_memory(&s->ram_region, NULL, "ram", - ram_size); - memory_region_add_subregion(addr_space, 0, &s->ram_region); - /* TIGbus, 0x801.0000.0000, 1GB. */ /* ??? The TIGbus is used for delivering interrupts, and access to the flash ROM. I'm not sure that we need to implement it at all. */