From patchwork Fri Oct 25 13:12:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Rolnik X-Patchwork-Id: 11212319 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5D34A1747 for ; Fri, 25 Oct 2019 13:17:06 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 319E821D7B for ; Fri, 25 Oct 2019 13:17:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="c4mZL5T1" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 319E821D7B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:59800 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iNzSi-0002rm-6O for patchwork-qemu-devel@patchwork.kernel.org; Fri, 25 Oct 2019 09:17:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58944) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iNzPI-0005A1-On for qemu-devel@nongnu.org; Fri, 25 Oct 2019 09:13:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iNzPH-00018C-4e for qemu-devel@nongnu.org; Fri, 25 Oct 2019 09:13:32 -0400 Received: from mail-wr1-x443.google.com ([2a00:1450:4864:20::443]:38989) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iNzPG-00017s-Uw for qemu-devel@nongnu.org; Fri, 25 Oct 2019 09:13:31 -0400 Received: by mail-wr1-x443.google.com with SMTP id a11so2291767wra.6 for ; Fri, 25 Oct 2019 06:13:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=oFf4ABG1fhsZWJkvvauFteZb4xaIDbQGZHjVyIxjveE=; b=c4mZL5T1wL1IgvJOwY0IJvvbNSyQjvH5f/1V4xfUxBPxiMbos2yqMo1EcIKgVU9WPV hTzW3zdRpRwY5/e/mUW5b/P7fY4tlX3Vkk5bihRd1YSHudfb7biNZeLoVbuRzIfKZZBe vI0ZeFyrdwnRG4oHt0CLcwkJQg9cDYLV2kso15tuFBak32A6JGPDH+cncrX8r+7GZGpr UrtbwKrbUOKirQSu7w78JnFPspX5zllo3zseJlkxaTeHyfs+jx63hHbAiIKZj31rZ+ml lc7UjSSqPkMpjP499xZCNjNWKc+SG7/rS5l87bz6U5xtsog4OS3jT6Dng9PMOuRADDBK P8Kw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=oFf4ABG1fhsZWJkvvauFteZb4xaIDbQGZHjVyIxjveE=; b=Fc9L4y9VDAlQ68jInJ1hhZ0RmU9UMFja+LeaHW8KaEce2GdFMNVP2qHM6sSVeJIh9G h790o6ulV/xOjkYrPytB3bO7h0PEqhey//nmBbOLaFYEh+HQo9pC+cfpUK7G95+C1k8t mQsuJV69LzDIAKGkGGpoJ7M7Oltja5qt4ABOyBmLFd7JuXmFWy/u3FcW2/EIDx440bfb EiCWJBa9fnohQEfXeYOMNEJZ/23+75TfAU5966NTaDPC/rWFOlmqVpzUsGhaEqOltFjd eQZmNiCoFMpHfyr/JDbyVLaZfXPEXfc54YA1SZEw8KtQ58C8oyhDVY65yiGjsAmfVKDB qMYg== X-Gm-Message-State: APjAAAWa1yWySBOVRpvktiBpMO3fXGfo0HLkMiLFXkbOGgyKpdOGyy0w uZ4xugeccRfv9lhOJweW8at0sryVBj4raQ== X-Google-Smtp-Source: APXvYqyGUCsEMK5jXRvlsfJdiyN5JeYHLEarfZbEzZbMGq8P3ZwTdyzkGKpYbyubAtwya/TgCZcahA== X-Received: by 2002:a5d:444b:: with SMTP id x11mr3009399wrr.207.1572009209322; Fri, 25 Oct 2019 06:13:29 -0700 (PDT) Received: from 8c859074c0ff.ant.amazon.com.com (bzq-79-181-93-41.red.bezeqint.net. [79.181.93.41]) by smtp.gmail.com with ESMTPSA id x205sm2616139wmb.5.2019.10.25.06.13.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 25 Oct 2019 06:13:28 -0700 (PDT) From: Michael Rolnik To: qemu-devel@nongnu.org Subject: [PATCH v34 12/13] target/avr: Register AVR support with the rest of QEMU, the build system, and the WMAINTAINERS file Date: Fri, 25 Oct 2019 16:12:36 +0300 Message-Id: <20191025131237.63149-13-mrolnik@gmail.com> X-Mailer: git-send-email 2.17.2 (Apple Git-113) In-Reply-To: <20191025131237.63149-1-mrolnik@gmail.com> References: <20191025131237.63149-1-mrolnik@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thuth@redhat.com, Michael Rolnik , richard.henderson@linaro.org, dovgaluk@ispras.ru, imammedo@redhat.com, philmd@redhat.com, aleksandar.m.mail@gmail.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Michael Rolnik --- MAINTAINERS | 9 +++++++++ arch_init.c | 2 ++ configure | 7 +++++++ default-configs/avr-softmmu.mak | 5 +++++ include/disas/dis-asm.h | 6 ++++++ include/sysemu/arch_init.h | 1 + qapi/machine.json | 3 ++- target/avr/Makefile.objs | 33 +++++++++++++++++++++++++++++++++ tests/machine-none-test.c | 1 + 9 files changed, 66 insertions(+), 1 deletion(-) create mode 100644 default-configs/avr-softmmu.mak create mode 100644 target/avr/Makefile.objs diff --git a/MAINTAINERS b/MAINTAINERS index ed41d7d1b6..931bbd17dd 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -163,6 +163,15 @@ S: Maintained F: hw/arm/smmu* F: include/hw/arm/smmu* +AVR TCG CPUs +M: Michael Rolnik +S: Maintained +F: target/avr/ +F: hw/misc/avr_mask.c +F: hw/char/avr_usart.c +F: hw/timer/avr_timer16.c +F: hw/avr/ + CRIS TCG CPUs M: Edgar E. Iglesias S: Maintained diff --git a/arch_init.c b/arch_init.c index 0a1531124c..fb308aa802 100644 --- a/arch_init.c +++ b/arch_init.c @@ -85,6 +85,8 @@ int graphic_depth = 32; #define QEMU_ARCH QEMU_ARCH_UNICORE32 #elif defined(TARGET_XTENSA) #define QEMU_ARCH QEMU_ARCH_XTENSA +#elif defined(TARGET_AVR) +#define QEMU_ARCH QEMU_ARCH_AVR #endif const uint32_t arch_type = QEMU_ARCH; diff --git a/configure b/configure index 145fcabbb3..b2a5ad4225 100755 --- a/configure +++ b/configure @@ -7457,6 +7457,10 @@ case "$target_name" in mttcg="yes" gdb_xml_files="aarch64-core.xml aarch64-fpu.xml arm-core.xml arm-vfp.xml arm-vfp3.xml arm-neon.xml" ;; + avr) + gdb_xml_files="avr-cpu.xml" + target_compiler=$cross_cc_avr + ;; cris) ;; hppa) @@ -7676,6 +7680,9 @@ for i in $ARCH $TARGET_BASE_ARCH ; do disas_config "ARM_A64" fi ;; + avr) + disas_config "AVR" + ;; cris) disas_config "CRIS" ;; diff --git a/default-configs/avr-softmmu.mak b/default-configs/avr-softmmu.mak new file mode 100644 index 0000000000..d1e1c28118 --- /dev/null +++ b/default-configs/avr-softmmu.mak @@ -0,0 +1,5 @@ +# Default configuration for avr-softmmu + +# Boards: +# +CONFIG_AVR_SAMPLE=y diff --git a/include/disas/dis-asm.h b/include/disas/dis-asm.h index e9c7dd8eb4..8bedce17ac 100644 --- a/include/disas/dis-asm.h +++ b/include/disas/dis-asm.h @@ -211,6 +211,12 @@ enum bfd_architecture #define bfd_mach_m32r 0 /* backwards compatibility */ bfd_arch_mn10200, /* Matsushita MN10200 */ bfd_arch_mn10300, /* Matsushita MN10300 */ + bfd_arch_avr, /* Atmel AVR microcontrollers. */ +#define bfd_mach_avr1 1 +#define bfd_mach_avr2 2 +#define bfd_mach_avr3 3 +#define bfd_mach_avr4 4 +#define bfd_mach_avr5 5 bfd_arch_cris, /* Axis CRIS */ #define bfd_mach_cris_v0_v10 255 #define bfd_mach_cris_v32 32 diff --git a/include/sysemu/arch_init.h b/include/sysemu/arch_init.h index 62c6fe4cf1..893df26ce2 100644 --- a/include/sysemu/arch_init.h +++ b/include/sysemu/arch_init.h @@ -24,6 +24,7 @@ enum { QEMU_ARCH_NIOS2 = (1 << 17), QEMU_ARCH_HPPA = (1 << 18), QEMU_ARCH_RISCV = (1 << 19), + QEMU_ARCH_AVR = (1 << 20), }; extern const uint32_t arch_type; diff --git a/qapi/machine.json b/qapi/machine.json index ca26779f1a..1fa2917ba9 100644 --- a/qapi/machine.json +++ b/qapi/machine.json @@ -21,11 +21,12 @@ # is true even for "qemu-system-x86_64". # # ppcemb: dropped in 3.1 +# avr: since 4.2 # # Since: 3.0 ## { 'enum' : 'SysEmuTarget', - 'data' : [ 'aarch64', 'alpha', 'arm', 'cris', 'hppa', 'i386', 'lm32', + 'data' : [ 'aarch64', 'alpha', 'arm', 'avr', 'cris', 'hppa', 'i386', 'lm32', 'm68k', 'microblaze', 'microblazeel', 'mips', 'mips64', 'mips64el', 'mipsel', 'moxie', 'nios2', 'or1k', 'ppc', 'ppc64', 'riscv32', 'riscv64', 's390x', 'sh4', diff --git a/target/avr/Makefile.objs b/target/avr/Makefile.objs new file mode 100644 index 0000000000..2976affd95 --- /dev/null +++ b/target/avr/Makefile.objs @@ -0,0 +1,33 @@ +# +# QEMU AVR CPU +# +# Copyright (c) 2019 Michael Rolnik +# +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. +# +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# Lesser General Public License for more details. +# +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, see +# +# + +DECODETREE = $(SRC_PATH)/scripts/decodetree.py +decode-y = $(SRC_PATH)/target/avr/insn.decode + +target/avr/decode_insn.inc.c: $(decode-y) $(DECODETREE) + $(call quiet-command, \ + $(PYTHON) $(DECODETREE) -o $@ --decode decode_insn --insnwidth 16 $<, \ + "GEN", $(TARGET_DIR)$@) + +target/avr/translate.o: target/avr/decode_insn.inc.c + +obj-y += translate.o cpu.o helper.o +obj-y += gdbstub.o +obj-$(CONFIG_SOFTMMU) += machine.o diff --git a/tests/machine-none-test.c b/tests/machine-none-test.c index 5953d31755..3e5c74e73e 100644 --- a/tests/machine-none-test.c +++ b/tests/machine-none-test.c @@ -27,6 +27,7 @@ static struct arch2cpu cpus_map[] = { /* tested targets list */ { "arm", "cortex-a15" }, { "aarch64", "cortex-a57" }, + { "avr", "avr6-avr-cpu" }, { "x86_64", "qemu64,apic-id=0" }, { "i386", "qemu32,apic-id=0" }, { "alpha", "ev67" },