Message ID | 20191106083444.41113-3-anup.patel@wdc.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | RTC support for QEMU RISC-V virt machine | expand |
On Wed, Nov 6, 2019 at 2:05 PM Anup Patel <Anup.Patel@wdc.com> wrote: > > We extend QEMU RISC-V virt machine by adding Goldfish RTC device > to it. This will allow Guest Linux to sync it's local date/time > with Host date/time via RTC device. > > Signed-off-by: Anup Patel <anup.patel@wdc.com> > Reviewed-by: Palmer Dabbelt <palmer@sifive.com> > Acked-by: Palmer Dabbelt <palmer@sifive.com> > Reviewed-by: Alistair Francis <alistair.francis@wdc.com> > --- > hw/riscv/Kconfig | 1 + > hw/riscv/virt.c | 15 +++++++++++++++ > include/hw/riscv/virt.h | 2 ++ > 3 files changed, 18 insertions(+) > > diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig > index b12660b9f8..ff9fbe958a 100644 > --- a/hw/riscv/Kconfig > +++ b/hw/riscv/Kconfig > @@ -34,6 +34,7 @@ config RISCV_VIRT > select PCI > select HART > select SERIAL > + select GOLDFISH_RTC > select VIRTIO_MMIO > select PCI_EXPRESS_GENERIC_BRIDGE > select PFLASH_CFI01 > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index cc8f311e6b..818678a4b2 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -58,6 +58,7 @@ static const struct MemmapEntry { > [VIRT_DEBUG] = { 0x0, 0x100 }, > [VIRT_MROM] = { 0x1000, 0x11000 }, > [VIRT_TEST] = { 0x100000, 0x1000 }, > + [VIRT_RTC] = { 0x101000, 0x1000 }, > [VIRT_CLINT] = { 0x2000000, 0x10000 }, > [VIRT_PLIC] = { 0xc000000, 0x4000000 }, > [VIRT_UART0] = { 0x10000000, 0x100 }, > @@ -376,6 +377,17 @@ static void create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap, > qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); > qemu_fdt_setprop_cell(fdt, nodename, "interrupts", UART0_IRQ); > > + nodename = g_strdup_printf("/rtc@%lx", > + (long)memmap[VIRT_RTC].base); > + qemu_fdt_add_subnode(fdt, nodename); > + qemu_fdt_setprop_string(fdt, nodename, "compatible", > + "google,goldfish-rtc"); > + qemu_fdt_setprop_cells(fdt, nodename, "reg", > + 0x0, memmap[VIRT_RTC].base, > + 0x0, memmap[VIRT_RTC].size); > + qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); > + qemu_fdt_setprop_cell(fdt, nodename, "interrupts", RTC_IRQ); > + We cannot create RTC node here because "nodename" is directly used as "stdout-path" below. Due to this patch, U-Boot S-mode stops working on QEMU because it see incorrect "stdout-path". I will quickly send updated v8 series. > qemu_fdt_add_subnode(fdt, "/chosen"); > qemu_fdt_setprop_string(fdt, "/chosen", "stdout-path", nodename); > if (cmdline) { > @@ -579,6 +591,9 @@ static void riscv_virt_board_init(MachineState *machine) > 0, qdev_get_gpio_in(DEVICE(s->plic), UART0_IRQ), 399193, > serial_hd(0), DEVICE_LITTLE_ENDIAN); > > + sysbus_create_simple("goldfish_rtc", memmap[VIRT_RTC].base, > + qdev_get_gpio_in(DEVICE(s->plic), RTC_IRQ)); > + > virt_flash_create(s); > > for (i = 0; i < ARRAY_SIZE(s->flash); i++) { > diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h > index b17048a93a..e69355efaf 100644 > --- a/include/hw/riscv/virt.h > +++ b/include/hw/riscv/virt.h > @@ -44,6 +44,7 @@ enum { > VIRT_DEBUG, > VIRT_MROM, > VIRT_TEST, > + VIRT_RTC, > VIRT_CLINT, > VIRT_PLIC, > VIRT_UART0, > @@ -57,6 +58,7 @@ enum { > > enum { > UART0_IRQ = 10, > + RTC_IRQ = 11, > VIRTIO_IRQ = 1, /* 1 to 8 */ > VIRTIO_COUNT = 8, > PCIE_IRQ = 0x20, /* 32 to 35 */ > -- > 2.17.1 > Regards, Anup
diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig index b12660b9f8..ff9fbe958a 100644 --- a/hw/riscv/Kconfig +++ b/hw/riscv/Kconfig @@ -34,6 +34,7 @@ config RISCV_VIRT select PCI select HART select SERIAL + select GOLDFISH_RTC select VIRTIO_MMIO select PCI_EXPRESS_GENERIC_BRIDGE select PFLASH_CFI01 diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index cc8f311e6b..818678a4b2 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -58,6 +58,7 @@ static const struct MemmapEntry { [VIRT_DEBUG] = { 0x0, 0x100 }, [VIRT_MROM] = { 0x1000, 0x11000 }, [VIRT_TEST] = { 0x100000, 0x1000 }, + [VIRT_RTC] = { 0x101000, 0x1000 }, [VIRT_CLINT] = { 0x2000000, 0x10000 }, [VIRT_PLIC] = { 0xc000000, 0x4000000 }, [VIRT_UART0] = { 0x10000000, 0x100 }, @@ -376,6 +377,17 @@ static void create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap, qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); qemu_fdt_setprop_cell(fdt, nodename, "interrupts", UART0_IRQ); + nodename = g_strdup_printf("/rtc@%lx", + (long)memmap[VIRT_RTC].base); + qemu_fdt_add_subnode(fdt, nodename); + qemu_fdt_setprop_string(fdt, nodename, "compatible", + "google,goldfish-rtc"); + qemu_fdt_setprop_cells(fdt, nodename, "reg", + 0x0, memmap[VIRT_RTC].base, + 0x0, memmap[VIRT_RTC].size); + qemu_fdt_setprop_cell(fdt, nodename, "interrupt-parent", plic_phandle); + qemu_fdt_setprop_cell(fdt, nodename, "interrupts", RTC_IRQ); + qemu_fdt_add_subnode(fdt, "/chosen"); qemu_fdt_setprop_string(fdt, "/chosen", "stdout-path", nodename); if (cmdline) { @@ -579,6 +591,9 @@ static void riscv_virt_board_init(MachineState *machine) 0, qdev_get_gpio_in(DEVICE(s->plic), UART0_IRQ), 399193, serial_hd(0), DEVICE_LITTLE_ENDIAN); + sysbus_create_simple("goldfish_rtc", memmap[VIRT_RTC].base, + qdev_get_gpio_in(DEVICE(s->plic), RTC_IRQ)); + virt_flash_create(s); for (i = 0; i < ARRAY_SIZE(s->flash); i++) { diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index b17048a93a..e69355efaf 100644 --- a/include/hw/riscv/virt.h +++ b/include/hw/riscv/virt.h @@ -44,6 +44,7 @@ enum { VIRT_DEBUG, VIRT_MROM, VIRT_TEST, + VIRT_RTC, VIRT_CLINT, VIRT_PLIC, VIRT_UART0, @@ -57,6 +58,7 @@ enum { enum { UART0_IRQ = 10, + RTC_IRQ = 11, VIRTIO_IRQ = 1, /* 1 to 8 */ VIRTIO_COUNT = 8, PCIE_IRQ = 0x20, /* 32 to 35 */