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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id i127sm3364581wma.35.2019.11.26.06.12.42 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Nov 2019 06:12:42 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 1/4] target/arm: Fix handling of cortex-m FTYPE flag in EXCRET Date: Tue, 26 Nov 2019 14:12:36 +0000 Message-Id: <20191126141239.8219-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191126141239.8219-1-peter.maydell@linaro.org> References: <20191126141239.8219-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::342 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Jean-Hugues Deschênes According to the PushStack() pseudocode in the armv7m RM, bit 4 of the LR should be set to NOT(CONTROL.PFCA) when an FPU is present. Current implementation is doing it for armv8, but not for armv7. This patch makes the existing logic applicable to both code paths. Signed-off-by: Jean-Hugues Deschenes Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/m_helper.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c index 4a48b792520..76de317e6af 100644 --- a/target/arm/m_helper.c +++ b/target/arm/m_helper.c @@ -2233,19 +2233,18 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs) if (env->v7m.secure) { lr |= R_V7M_EXCRET_S_MASK; } - if (!(env->v7m.control[M_REG_S] & R_V7M_CONTROL_FPCA_MASK)) { - lr |= R_V7M_EXCRET_FTYPE_MASK; - } } else { lr = R_V7M_EXCRET_RES1_MASK | R_V7M_EXCRET_S_MASK | R_V7M_EXCRET_DCRS_MASK | - R_V7M_EXCRET_FTYPE_MASK | R_V7M_EXCRET_ES_MASK; if (env->v7m.control[M_REG_NS] & R_V7M_CONTROL_SPSEL_MASK) { lr |= R_V7M_EXCRET_SPSEL_MASK; } } + if (!(env->v7m.control[M_REG_S] & R_V7M_CONTROL_FPCA_MASK)) { + lr |= R_V7M_EXCRET_FTYPE_MASK; + } if (!arm_v7m_is_handler_mode(env)) { lr |= R_V7M_EXCRET_MODE_MASK; }