| Message ID | 20191211170520.7747-12-alex.bennee@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | gdbstub refactor and SVE support (+check-tcg tweaks) | expand |
On 12/11/19 9:05 AM, Alex Bennée wrote: > The Linux kernel chooses the default of 64 bytes for SVE registers on > the basis that it is the largest size on known hardware that won't > grow the signal frame. We still honour the sve-max-vq property and > userspace can expand the number of lanes by calling PR_SVE_SET_VL. > > This should not make any difference to SVE enabled software as the SVE > is of course vector length agnostic. > > Signed-off-by: Alex Bennée <alex.bennee@linaro.org> > > --- > v2 > - tweak zcr_el[1] instead > --- > target/arm/cpu.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/target/arm/cpu.c b/target/arm/cpu.c > index 7a4ac9339bf..d42b88c9b73 100644 > --- a/target/arm/cpu.c > +++ b/target/arm/cpu.c > @@ -199,9 +199,9 @@ static void arm_cpu_reset(CPUState *s) > /* and to the SVE instructions */ > env->cp15.cpacr_el1 = deposit64(env->cp15.cpacr_el1, 16, 2, 3); > env->cp15.cptr_el[3] |= CPTR_EZ; > - /* with maximum vector length */ > + /* with reasonable vector length */ I think this comment should mention the kernel as well. Otherwise, Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 7a4ac9339bf..d42b88c9b73 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -199,9 +199,9 @@ static void arm_cpu_reset(CPUState *s) /* and to the SVE instructions */ env->cp15.cpacr_el1 = deposit64(env->cp15.cpacr_el1, 16, 2, 3); env->cp15.cptr_el[3] |= CPTR_EZ; - /* with maximum vector length */ + /* with reasonable vector length */ env->vfp.zcr_el[1] = cpu_isar_feature(aa64_sve, cpu) ? - cpu->sve_max_vq - 1 : 0; + MIN(cpu->sve_max_vq - 1, 3) : 0; env->vfp.zcr_el[2] = env->vfp.zcr_el[1]; env->vfp.zcr_el[3] = env->vfp.zcr_el[1]; /*
The Linux kernel chooses the default of 64 bytes for SVE registers on the basis that it is the largest size on known hardware that won't grow the signal frame. We still honour the sve-max-vq property and userspace can expand the number of lanes by calling PR_SVE_SET_VL. This should not make any difference to SVE enabled software as the SVE is of course vector length agnostic. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> --- v2 - tweak zcr_el[1] instead --- target/arm/cpu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)