From patchwork Tue Dec 17 04:42:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 11296639 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 207976C1 for ; Tue, 17 Dec 2019 05:15:14 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EA2DF2072D for ; Tue, 17 Dec 2019 05:15:13 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=gibson.dropbear.id.au header.i=@gibson.dropbear.id.au header.b="JwQiLSDK" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EA2DF2072D Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=gibson.dropbear.id.au Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:35558 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ih5CS-0001tX-Fd for patchwork-qemu-devel@patchwork.kernel.org; Tue, 17 Dec 2019 00:15:12 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34397) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ih4iy-00011S-FN for qemu-devel@nongnu.org; Mon, 16 Dec 2019 23:44:45 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ih4iw-0006SM-Se for qemu-devel@nongnu.org; Mon, 16 Dec 2019 23:44:44 -0500 Received: from ozlabs.org ([203.11.71.1]:36259) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ih4iw-0005xo-Gs; Mon, 16 Dec 2019 23:44:42 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 47cQWY231Mz9sT8; Tue, 17 Dec 2019 15:43:35 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1576557817; bh=nv2sfMu4exbWQFeK7G3IiZ7uOvCpR+2vpj7MWBUe+D4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JwQiLSDKsC3Uy0NpWG33BnYXxdOHij68wkos6zxswhGfd3WgsHlzPYRXsV3AzPN2K xNBEJvOrR6eA8nUf+uu7jhw8ddTdSpdtZSeTFKanP1sYMhyN2aN6qoMNwggQmgCfXH imgAKoJES6HCTe6TFZnN07Bt0VbTlB71fenOKzwo= From: David Gibson To: peter.maydell@linaro.org Subject: [PULL 40/88] spapr: Pass the maximum number of vCPUs to the KVM interrupt controller Date: Tue, 17 Dec 2019 15:42:34 +1100 Message-Id: <20191217044322.351838-41-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191217044322.351838-1-david@gibson.dropbear.id.au> References: <20191217044322.351838-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 203.11.71.1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, aik@ozlabs.ru, qemu-devel@nongnu.org, groug@kaod.org, qemu-ppc@nongnu.org, clg@kaod.org, David Gibson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Greg Kurz The XIVE and XICS-on-XIVE KVM devices on POWER9 hosts can greatly reduce their consumption of some scarce HW resources, namely Virtual Presenter identifiers, if they know the maximum number of vCPUs that may run in the VM. Prepare ground for this by passing the value down to xics_kvm_connect() and kvmppc_xive_connect(). This is purely mechanical, no functional change. Signed-off-by: Greg Kurz Message-Id: <157478678301.67101.2717368060417156338.stgit@bahia.tlslab.ibm.com> Reviewed-by: Cédric Le Goater Signed-off-by: David Gibson --- hw/intc/spapr_xive.c | 6 ++++-- hw/intc/spapr_xive_kvm.c | 3 ++- hw/intc/xics_kvm.c | 3 ++- hw/intc/xics_spapr.c | 5 +++-- hw/ppc/spapr_irq.c | 8 +++++--- include/hw/ppc/spapr_irq.h | 10 ++++++++-- include/hw/ppc/spapr_xive.h | 3 ++- include/hw/ppc/xics_spapr.h | 3 ++- 8 files changed, 28 insertions(+), 13 deletions(-) diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index bb3b2dfdb7..18a043a277 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -697,12 +697,14 @@ static void spapr_xive_dt(SpaprInterruptController *intc, uint32_t nr_servers, plat_res_int_priorities, sizeof(plat_res_int_priorities))); } -static int spapr_xive_activate(SpaprInterruptController *intc, Error **errp) +static int spapr_xive_activate(SpaprInterruptController *intc, + uint32_t nr_servers, Error **errp) { SpaprXive *xive = SPAPR_XIVE(intc); if (kvm_enabled()) { - int rc = spapr_irq_init_kvm(kvmppc_xive_connect, intc, errp); + int rc = spapr_irq_init_kvm(kvmppc_xive_connect, intc, nr_servers, + errp); if (rc < 0) { return rc; } diff --git a/hw/intc/spapr_xive_kvm.c b/hw/intc/spapr_xive_kvm.c index 69e73552f1..46c7609bd8 100644 --- a/hw/intc/spapr_xive_kvm.c +++ b/hw/intc/spapr_xive_kvm.c @@ -728,7 +728,8 @@ static void *kvmppc_xive_mmap(SpaprXive *xive, int pgoff, size_t len, * All the XIVE memory regions are now backed by mappings from the KVM * XIVE device. */ -int kvmppc_xive_connect(SpaprInterruptController *intc, Error **errp) +int kvmppc_xive_connect(SpaprInterruptController *intc, uint32_t nr_servers, + Error **errp) { SpaprXive *xive = SPAPR_XIVE(intc); XiveSource *xsrc = &xive->source; diff --git a/hw/intc/xics_kvm.c b/hw/intc/xics_kvm.c index 954c424b36..a1f1b7b0d3 100644 --- a/hw/intc/xics_kvm.c +++ b/hw/intc/xics_kvm.c @@ -342,7 +342,8 @@ void ics_kvm_set_irq(ICSState *ics, int srcno, int val) } } -int xics_kvm_connect(SpaprInterruptController *intc, Error **errp) +int xics_kvm_connect(SpaprInterruptController *intc, uint32_t nr_servers, + Error **errp) { ICSState *ics = ICS_SPAPR(intc); int rc; diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c index b3705dab0e..8ae4f41459 100644 --- a/hw/intc/xics_spapr.c +++ b/hw/intc/xics_spapr.c @@ -422,10 +422,11 @@ static int xics_spapr_post_load(SpaprInterruptController *intc, int version_id) return 0; } -static int xics_spapr_activate(SpaprInterruptController *intc, Error **errp) +static int xics_spapr_activate(SpaprInterruptController *intc, + uint32_t nr_servers, Error **errp) { if (kvm_enabled()) { - return spapr_irq_init_kvm(xics_kvm_connect, intc, errp); + return spapr_irq_init_kvm(xics_kvm_connect, intc, nr_servers, errp); } return 0; } diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index d4a54afc86..07e08d6544 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -70,15 +70,16 @@ void spapr_irq_msi_free(SpaprMachineState *spapr, int irq, uint32_t num) bitmap_clear(spapr->irq_map, irq - SPAPR_IRQ_MSI, num); } -int spapr_irq_init_kvm(int (*fn)(SpaprInterruptController *, Error **), +int spapr_irq_init_kvm(SpaprInterruptControllerInitKvm fn, SpaprInterruptController *intc, + uint32_t nr_servers, Error **errp) { MachineState *machine = MACHINE(qdev_get_machine()); Error *local_err = NULL; if (kvm_enabled() && machine_kernel_irqchip_allowed(machine)) { - if (fn(intc, &local_err) < 0) { + if (fn(intc, nr_servers, &local_err) < 0) { if (machine_kernel_irqchip_required(machine)) { error_prepend(&local_err, "kernel_irqchip requested but unavailable: "); @@ -481,6 +482,7 @@ static void set_active_intc(SpaprMachineState *spapr, SpaprInterruptController *new_intc) { SpaprInterruptControllerClass *sicc; + uint32_t nr_servers = spapr_max_server_number(spapr); assert(new_intc); @@ -498,7 +500,7 @@ static void set_active_intc(SpaprMachineState *spapr, sicc = SPAPR_INTC_GET_CLASS(new_intc); if (sicc->activate) { - sicc->activate(new_intc, &error_fatal); + sicc->activate(new_intc, nr_servers, &error_fatal); } spapr->active_intc = new_intc; diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h index ff814d13de..ca8cb44213 100644 --- a/include/hw/ppc/spapr_irq.h +++ b/include/hw/ppc/spapr_irq.h @@ -43,7 +43,8 @@ typedef struct SpaprInterruptController SpaprInterruptController; typedef struct SpaprInterruptControllerClass { InterfaceClass parent; - int (*activate)(SpaprInterruptController *intc, Error **errp); + int (*activate)(SpaprInterruptController *intc, uint32_t nr_servers, + Error **errp); void (*deactivate)(SpaprInterruptController *intc); /* @@ -98,8 +99,13 @@ qemu_irq spapr_qirq(SpaprMachineState *spapr, int irq); int spapr_irq_post_load(SpaprMachineState *spapr, int version_id); void spapr_irq_reset(SpaprMachineState *spapr, Error **errp); int spapr_irq_get_phandle(SpaprMachineState *spapr, void *fdt, Error **errp); -int spapr_irq_init_kvm(int (*fn)(SpaprInterruptController *, Error **), + +typedef int (*SpaprInterruptControllerInitKvm)(SpaprInterruptController *, + uint32_t, Error **); + +int spapr_irq_init_kvm(SpaprInterruptControllerInitKvm fn, SpaprInterruptController *intc, + uint32_t nr_servers, Error **errp); /* diff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h index 742b7e834f..3a103c224d 100644 --- a/include/hw/ppc/spapr_xive.h +++ b/include/hw/ppc/spapr_xive.h @@ -66,7 +66,8 @@ int spapr_xive_end_to_target(uint8_t end_blk, uint32_t end_idx, /* * KVM XIVE device helpers */ -int kvmppc_xive_connect(SpaprInterruptController *intc, Error **errp); +int kvmppc_xive_connect(SpaprInterruptController *intc, uint32_t nr_servers, + Error **errp); void kvmppc_xive_disconnect(SpaprInterruptController *intc); void kvmppc_xive_reset(SpaprXive *xive, Error **errp); void kvmppc_xive_set_source_config(SpaprXive *xive, uint32_t lisn, XiveEAS *eas, diff --git a/include/hw/ppc/xics_spapr.h b/include/hw/ppc/xics_spapr.h index 28b87038c8..1c65c96e3c 100644 --- a/include/hw/ppc/xics_spapr.h +++ b/include/hw/ppc/xics_spapr.h @@ -32,7 +32,8 @@ #define TYPE_ICS_SPAPR "ics-spapr" #define ICS_SPAPR(obj) OBJECT_CHECK(ICSState, (obj), TYPE_ICS_SPAPR) -int xics_kvm_connect(SpaprInterruptController *intc, Error **errp); +int xics_kvm_connect(SpaprInterruptController *intc, uint32_t nr_servers, + Error **errp); void xics_kvm_disconnect(SpaprInterruptController *intc); bool xics_kvm_has_broken_disconnect(SpaprMachineState *spapr);