diff mbox series

[v3,2/2] hw/timer/m48t59: Convert debug printf()s to trace events

Message ID 20200117165809.31067-3-philmd@redhat.com (mailing list archive)
State New, archived
Headers show
Series hw/timer/m48t59: Convert to trace events | expand

Commit Message

Philippe Mathieu-Daudé Jan. 17, 2020, 4:58 p.m. UTC 
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
 hw/rtc/m48t59-internal.h |  5 -----
 hw/rtc/m48t59.c          | 11 +++++------
 hw/rtc/trace-events      |  6 ++++++
 3 files changed, 11 insertions(+), 11 deletions(-)

Comments

Philippe Mathieu-Daudé Jan. 20, 2020, 7:12 p.m. UTC | #1 
On 1/17/20 5:58 PM, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
>   hw/rtc/m48t59-internal.h |  5 -----
>   hw/rtc/m48t59.c          | 11 +++++------
>   hw/rtc/trace-events      |  6 ++++++
>   3 files changed, 11 insertions(+), 11 deletions(-)
> 
> diff --git a/hw/rtc/m48t59-internal.h b/hw/rtc/m48t59-internal.h
> index 4d4f2a6fed..cd648241e9 100644
> --- a/hw/rtc/m48t59-internal.h
> +++ b/hw/rtc/m48t59-internal.h
> @@ -26,11 +26,6 @@
>   #ifndef HW_M48T59_INTERNAL_H
>   #define HW_M48T59_INTERNAL_H
>   
> -#define M48T59_DEBUG 0
> -
> -#define NVRAM_PRINTF(fmt, ...) do { \
> -    if (M48T59_DEBUG) { printf(fmt , ## __VA_ARGS__); } } while (0)
> -
>   /*
>    * The M48T02, M48T08 and M48T59 chips are very similar. The newer '59 has
>    * alarm and a watchdog timer and related control registers. In the
> diff --git a/hw/rtc/m48t59.c b/hw/rtc/m48t59.c
> index fc592b9fb1..ecc92ca476 100644
> --- a/hw/rtc/m48t59.c
> +++ b/hw/rtc/m48t59.c
> @@ -35,6 +35,7 @@
>   #include "exec/address-spaces.h"
>   #include "qemu/bcd.h"
>   #include "qemu/module.h"
> +#include "trace.h"
>   
>   #include "m48t59-internal.h"
>   #include "migration/vmstate.h"
> @@ -192,8 +193,7 @@ void m48t59_write(M48t59State *NVRAM, uint32_t addr, uint32_t val)
>       struct tm tm;
>       int tmp;
>   
> -    if (addr > 0x1FF8 && addr < 0x2000)
> -	NVRAM_PRINTF("%s: 0x%08x => 0x%08x\n", __func__, addr, val);
> +    trace_m48txx_nvram_mem_write(addr, val);
>   
>       /* check for NVRAM access */
>       if ((NVRAM->model == 2 && addr < 0x7f8) ||
> @@ -450,8 +450,7 @@ uint32_t m48t59_read(M48t59State *NVRAM, uint32_t addr)
>   	}
>           break;
>       }
> -    if (addr > 0x1FF9 && addr < 0x2000)
> -       NVRAM_PRINTF("%s: 0x%08x <= 0x%08x\n", __func__, addr, retval);
> +    trace_m48txx_nvram_mem_read(addr, retval);
>   
>       return retval;
>   }
> @@ -462,7 +461,7 @@ static void NVRAM_writeb(void *opaque, hwaddr addr, uint64_t val,
>   {
>       M48t59State *NVRAM = opaque;
>   
> -    NVRAM_PRINTF("%s: 0x%"HWADDR_PRIx" => 0x%"PRIx64"\n", __func__, addr, val);
> +    trace_m48txx_nvram_io_write(addr, val);
>       switch (addr) {
>       case 0:
>           NVRAM->addr &= ~0x00FF;
> @@ -494,7 +493,7 @@ static uint64_t NVRAM_readb(void *opaque, hwaddr addr, unsigned size)
>           retval = -1;
>           break;
>       }
> -    NVRAM_PRINTF("%s: 0x%"HWADDR_PRIx" <= 0x%08x\n", __func__, addr, retval);
> +    trace_m48txx_nvram_io_read(addr, retval);
>   
>       return retval;
>   }
> diff --git a/hw/rtc/trace-events b/hw/rtc/trace-events
> index d6749f4616..52c1566198 100644
> --- a/hw/rtc/trace-events
> +++ b/hw/rtc/trace-events
> @@ -17,3 +17,9 @@ pl031_set_alarm(uint32_t ticks) "alarm set for %u ticks"
>   # aspeed-rtc.c
>   aspeed_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64
>   aspeed_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64
> +
> +# m48t59.c
> +m48txx_nvram_io_read(uint64_t addr, uint64_t value) "io read addr:0x%04" PRIx64 " value:0x%02" PRIx64
> +m48txx_nvram_io_write(uint64_t addr, uint64_t value) "io write addr:0x%04" PRIx64 " value:0x%02" PRIx64
> +m48txx_nvram_mem_read(uint32_t addr, uint32_t value) "mem read addr:0x%04x value:0x%02x"
> +m48txx_nvram_mem_write(uint32_t addr, uint32_t value) "mem write addr:0x%04x value:0x%02x"
> 

I dropped the other patch from this series.

Since Hervé already reviewed it:
https://www.mail-archive.com/qemu-devel@nongnu.org/msg671652.html
and it applies properly, can it get queued?

Thanks,

Phil.
Laurent Vivier Feb. 6, 2020, 9:51 a.m. UTC | #2 
Le 17/01/2020 à 17:58, Philippe Mathieu-Daudé a écrit :
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
>  hw/rtc/m48t59-internal.h |  5 -----
>  hw/rtc/m48t59.c          | 11 +++++------
>  hw/rtc/trace-events      |  6 ++++++
>  3 files changed, 11 insertions(+), 11 deletions(-)
> 
> diff --git a/hw/rtc/m48t59-internal.h b/hw/rtc/m48t59-internal.h
> index 4d4f2a6fed..cd648241e9 100644
> --- a/hw/rtc/m48t59-internal.h
> +++ b/hw/rtc/m48t59-internal.h
> @@ -26,11 +26,6 @@
>  #ifndef HW_M48T59_INTERNAL_H
>  #define HW_M48T59_INTERNAL_H
>  
> -#define M48T59_DEBUG 0
> -
> -#define NVRAM_PRINTF(fmt, ...) do { \
> -    if (M48T59_DEBUG) { printf(fmt , ## __VA_ARGS__); } } while (0)
> -
>  /*
>   * The M48T02, M48T08 and M48T59 chips are very similar. The newer '59 has
>   * alarm and a watchdog timer and related control registers. In the
> diff --git a/hw/rtc/m48t59.c b/hw/rtc/m48t59.c
> index fc592b9fb1..ecc92ca476 100644
> --- a/hw/rtc/m48t59.c
> +++ b/hw/rtc/m48t59.c
> @@ -35,6 +35,7 @@
>  #include "exec/address-spaces.h"
>  #include "qemu/bcd.h"
>  #include "qemu/module.h"
> +#include "trace.h"
>  
>  #include "m48t59-internal.h"
>  #include "migration/vmstate.h"
> @@ -192,8 +193,7 @@ void m48t59_write(M48t59State *NVRAM, uint32_t addr, uint32_t val)
>      struct tm tm;
>      int tmp;
>  
> -    if (addr > 0x1FF8 && addr < 0x2000)
> -	NVRAM_PRINTF("%s: 0x%08x => 0x%08x\n", __func__, addr, val);
> +    trace_m48txx_nvram_mem_write(addr, val);
>  
>      /* check for NVRAM access */
>      if ((NVRAM->model == 2 && addr < 0x7f8) ||
> @@ -450,8 +450,7 @@ uint32_t m48t59_read(M48t59State *NVRAM, uint32_t addr)
>  	}
>          break;
>      }
> -    if (addr > 0x1FF9 && addr < 0x2000)
> -       NVRAM_PRINTF("%s: 0x%08x <= 0x%08x\n", __func__, addr, retval);
> +    trace_m48txx_nvram_mem_read(addr, retval);
>  
>      return retval;
>  }
> @@ -462,7 +461,7 @@ static void NVRAM_writeb(void *opaque, hwaddr addr, uint64_t val,
>  {
>      M48t59State *NVRAM = opaque;
>  
> -    NVRAM_PRINTF("%s: 0x%"HWADDR_PRIx" => 0x%"PRIx64"\n", __func__, addr, val);
> +    trace_m48txx_nvram_io_write(addr, val);
>      switch (addr) {
>      case 0:
>          NVRAM->addr &= ~0x00FF;
> @@ -494,7 +493,7 @@ static uint64_t NVRAM_readb(void *opaque, hwaddr addr, unsigned size)
>          retval = -1;
>          break;
>      }
> -    NVRAM_PRINTF("%s: 0x%"HWADDR_PRIx" <= 0x%08x\n", __func__, addr, retval);
> +    trace_m48txx_nvram_io_read(addr, retval);
>  
>      return retval;
>  }
> diff --git a/hw/rtc/trace-events b/hw/rtc/trace-events
> index d6749f4616..52c1566198 100644
> --- a/hw/rtc/trace-events
> +++ b/hw/rtc/trace-events
> @@ -17,3 +17,9 @@ pl031_set_alarm(uint32_t ticks) "alarm set for %u ticks"
>  # aspeed-rtc.c
>  aspeed_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64
>  aspeed_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64
> +
> +# m48t59.c
> +m48txx_nvram_io_read(uint64_t addr, uint64_t value) "io read addr:0x%04" PRIx64 " value:0x%02" PRIx64
> +m48txx_nvram_io_write(uint64_t addr, uint64_t value) "io write addr:0x%04" PRIx64 " value:0x%02" PRIx64
> +m48txx_nvram_mem_read(uint32_t addr, uint32_t value) "mem read addr:0x%04x value:0x%02x"
> +m48txx_nvram_mem_write(uint32_t addr, uint32_t value) "mem write addr:0x%04x value:0x%02x"
> 

Applied to my trivial-patches branch.

Thanks,
Laurent
diff mbox series

Patch

diff --git a/hw/rtc/m48t59-internal.h b/hw/rtc/m48t59-internal.h
index 4d4f2a6fed..cd648241e9 100644
--- a/hw/rtc/m48t59-internal.h
+++ b/hw/rtc/m48t59-internal.h
@@ -26,11 +26,6 @@ 
 #ifndef HW_M48T59_INTERNAL_H
 #define HW_M48T59_INTERNAL_H
 
-#define M48T59_DEBUG 0
-
-#define NVRAM_PRINTF(fmt, ...) do { \
-    if (M48T59_DEBUG) { printf(fmt , ## __VA_ARGS__); } } while (0)
-
 /*
  * The M48T02, M48T08 and M48T59 chips are very similar. The newer '59 has
  * alarm and a watchdog timer and related control registers. In the
diff --git a/hw/rtc/m48t59.c b/hw/rtc/m48t59.c
index fc592b9fb1..ecc92ca476 100644
--- a/hw/rtc/m48t59.c
+++ b/hw/rtc/m48t59.c
@@ -35,6 +35,7 @@ 
 #include "exec/address-spaces.h"
 #include "qemu/bcd.h"
 #include "qemu/module.h"
+#include "trace.h"
 
 #include "m48t59-internal.h"
 #include "migration/vmstate.h"
@@ -192,8 +193,7 @@  void m48t59_write(M48t59State *NVRAM, uint32_t addr, uint32_t val)
     struct tm tm;
     int tmp;
 
-    if (addr > 0x1FF8 && addr < 0x2000)
-	NVRAM_PRINTF("%s: 0x%08x => 0x%08x\n", __func__, addr, val);
+    trace_m48txx_nvram_mem_write(addr, val);
 
     /* check for NVRAM access */
     if ((NVRAM->model == 2 && addr < 0x7f8) ||
@@ -450,8 +450,7 @@  uint32_t m48t59_read(M48t59State *NVRAM, uint32_t addr)
 	}
         break;
     }
-    if (addr > 0x1FF9 && addr < 0x2000)
-       NVRAM_PRINTF("%s: 0x%08x <= 0x%08x\n", __func__, addr, retval);
+    trace_m48txx_nvram_mem_read(addr, retval);
 
     return retval;
 }
@@ -462,7 +461,7 @@  static void NVRAM_writeb(void *opaque, hwaddr addr, uint64_t val,
 {
     M48t59State *NVRAM = opaque;
 
-    NVRAM_PRINTF("%s: 0x%"HWADDR_PRIx" => 0x%"PRIx64"\n", __func__, addr, val);
+    trace_m48txx_nvram_io_write(addr, val);
     switch (addr) {
     case 0:
         NVRAM->addr &= ~0x00FF;
@@ -494,7 +493,7 @@  static uint64_t NVRAM_readb(void *opaque, hwaddr addr, unsigned size)
         retval = -1;
         break;
     }
-    NVRAM_PRINTF("%s: 0x%"HWADDR_PRIx" <= 0x%08x\n", __func__, addr, retval);
+    trace_m48txx_nvram_io_read(addr, retval);
 
     return retval;
 }
diff --git a/hw/rtc/trace-events b/hw/rtc/trace-events
index d6749f4616..52c1566198 100644
--- a/hw/rtc/trace-events
+++ b/hw/rtc/trace-events
@@ -17,3 +17,9 @@  pl031_set_alarm(uint32_t ticks) "alarm set for %u ticks"
 # aspeed-rtc.c
 aspeed_rtc_read(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64
 aspeed_rtc_write(uint64_t addr, uint64_t value) "addr 0x%02" PRIx64 " value 0x%08" PRIx64
+
+# m48t59.c
+m48txx_nvram_io_read(uint64_t addr, uint64_t value) "io read addr:0x%04" PRIx64 " value:0x%02" PRIx64
+m48txx_nvram_io_write(uint64_t addr, uint64_t value) "io write addr:0x%04" PRIx64 " value:0x%02" PRIx64
+m48txx_nvram_mem_read(uint32_t addr, uint32_t value) "mem read addr:0x%04x value:0x%02x"
+m48txx_nvram_mem_write(uint32_t addr, uint32_t value) "mem write addr:0x%04x value:0x%02x"