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[83.52.55.162]) by smtp.gmail.com with ESMTPSA id w20sm22396778wmk.34.2020.02.03.00.26.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Feb 2020 00:26:30 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 6/6] hw/arm/raspi: Get the CPU core count from the revision code Date: Mon, 3 Feb 2020 09:26:19 +0100 Message-Id: <20200203082619.7426-7-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200203082619.7426-1-f4bug@amsat.org> References: <20200203082619.7426-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::442 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Alistair Francis , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Andrew Baumann , qemu-arm@nongnu.org, Igor Mammedov , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" The number of cores is tied to the SoC, and we already know how to extract the Chip ID from the revision code. Use it to determine the number of cores. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/raspi.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index 12dc4d1486..aff5d57261 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -39,9 +39,10 @@ enum BoardIdChip { static const struct { const char *soc_name; + int cores_count; } soc_config[] = { - [C_BCM2836] = {TYPE_BCM2836}, - [C_BCM2837] = {TYPE_BCM2837}, + [C_BCM2836] = {TYPE_BCM2836, BCM283X_NCPUS}, + [C_BCM2837] = {TYPE_BCM2837, BCM283X_NCPUS}, }; typedef struct RaspiMachineState { @@ -113,6 +114,11 @@ static const char *board_soc_name(const RaspiBoardInfo *config) return soc_config[board_chip_id(config)].soc_name; } +static int cpu_cores_count(const RaspiBoardInfo *config) +{ + return soc_config[board_chip_id(config)].cores_count; +} + static void write_smpboot(ARMCPU *cpu, const struct arm_boot_info *info) { static const uint32_t smpboot[] = { @@ -312,9 +318,7 @@ static void raspi_machine_class_init(ObjectClass *oc, void *data) mc->no_parallel = 1; mc->no_floppy = 1; mc->no_cdrom = 1; - mc->max_cpus = BCM283X_NCPUS; - mc->min_cpus = BCM283X_NCPUS; - mc->default_cpus = BCM283X_NCPUS; + mc->default_cpus = mc->min_cpus = mc->max_cpus = cpu_cores_count(config); mc->default_ram_size = board_ram_size(config); mc->ignore_memory_transaction_failures = true; }