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Tue, 4 Feb 2020 09:52:30 +0000 From: Klaus Jensen To: Subject: [PATCH v5 24/26] nvme: change controller pci id Date: Tue, 4 Feb 2020 10:52:06 +0100 Message-ID: <20200204095208.269131-25-k.jensen@samsung.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200204095208.269131-1-k.jensen@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA01Sa0hTYRjm29nOzlaTs6n4pUU5RchKu9IRTRP8MfoR9S+EzJN+qLSL7ajN QJoJ3krThVM3VhaRlz/lnDozGy502tKl4EiTFJtkkhdQu0rmdlb473mfy/c+vHwEJnnECyVy lHlIraTlUlzI7Rr8OXpkJjEu7eiv1j1Ux70yQNn6v/Eond0NqCdjiHowFUEZlstwylFl5Z7l y0atLr7M3FaBy6bdL3GZx93Bka28msAv8FKFCZlInlOA1LGJ6cLsZ0MWTm57qGZsXKgFDcGV gCAgeRJaRs5VAiEhIVsANEx2YOywDuC0Vucf1gDc8vRyKoHAl9DPL/mFZgBbZp/z/7umxks4 7OAE8HXdoF/pAfBNYznmzePkQdi9ucX14iAyDJZN6HheE0b+BtBUXIt7hUCSgubaTr4Xc8lI OP+5yceLyHhotHXjbJH90Fjs9GHBNm9rG+KwHjEcbvT4FmDbnpJOI8ZiCPsXFnzFIdnFh83r Vf6HUuC7qUE/DoSLDgufxXvhVs9DDhu4A2D16oY/3QBg/dPvOHvBeFj9Vs4GkmHt0CqfpQPg +yUxuzgA6rrqMZYWwfJSCeuOgtbbnaAGRBh21DbsqG3YUbsJYG0gBOUziizEHFeiGzEMrWDy lVkxGSqFGWx/HOcfx7oVvNi8agckAaS7RcMjVJqERxcwhQo7gAQmDRK5YuPSJKJMuvAmUquu qPPliLGDMIIrDRGdePzlsoTMovPQNYRykfqfyiEEoVqwryJ7URw1fsaud6QURM79wExJhRkK tam3JkAjQNfDU4OT10pnJl1R8yKX5iutSjqv1y4vpyir5nataD60RA4cCtPPJguRW7F4WvWx P72I0RwwJ4rD8y6agse6nR6UsHHf3kQ0m0/1PZ43tlvslwb6WuuiDxcZPrXa7t5SSLlMNn0s GlMz9F8JSwF2NAMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrDIsWRmVeSWpSXmKPExsVy+t/xu7r37SzjDI5N5bTY3N/OaLH/4DdW i0mHrjFaLLmYajHvlrLFrHftbBbHe3ewOLB7nNtxnt1j06pONo871/aweTy5tpnJ4/2+q2wB rFF6NkX5pSWpChn5xSW2StGGFkZ6hpYWekYmlnqGxuaxVkamSvp2NimpOZllqUX6dgl6GetP bGEq2ChVcfESVwPjDNEuRk4OCQETiWlP3zJ3MXJxCAksZZSYe/AwI0RCRuLTlY/sELawxJ9r XWwQRR8ZJe4c+sIC4ZxmlNh06jEjhLOTUaJx02+wFjYBTYntf/6zgNgiAtIS7VcnsYLYzAK/ GSX+9AWC2MICFhKbJm4Fq2cRUJF4+nwBG4jNK2AtMXv/djaI1fISsxtPg9mcQPH9q04wdTFy AC2zkmg9yg1RLihxcuYTFojx8hLNW2czQ9gSEgdfvGCewCg8C0nZLCRls5CULWBkXsUoklpa nJueW2yoV5yYW1yal66XnJ+7iREYc9uO/dy8g/HSxuBDjAIcjEo8vBfsLOKEWBPLiitzDzFK cDArifCe17eME+JNSaysSi3Kjy8qzUktPsRoCvTbRGYp0eR8YDrIK4k3NDU0t7A0NDc2Nzaz UBLn7RA4GCMkkJ5YkpqdmlqQWgTTx8TBKdXA2FbKKXe6IuSSSLe30Y8u/U+/S2Q3L7MSLir/ rj6d0fCscFTDsR+af883Gcakv732Tabwmvd9EfH4fS8yvv5LLwlJKvALVNCtubJuwnexy19z jB7f+pJ+9kqxsKfPJdEdry1k5U+xL6x0eOLwePcHZqs1ETXnMz2KNU7+/yRxT/Omg8jHoMNq SizFGYmGWsxFxYkA1uu1Xs8CAAA= X-CMS-MailID: 20200204095231eucas1p21019b1d857fcda9d67950e7d01de6b6a X-Msg-Generator: CA X-RootMTR: 20200204095231eucas1p21019b1d857fcda9d67950e7d01de6b6a X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20200204095231eucas1p21019b1d857fcda9d67950e7d01de6b6a References: <20200204095208.269131-1-k.jensen@samsung.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 210.118.77.11 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , Beata Michalska , qemu-devel@nongnu.org, Max Reitz , Klaus Jensen , Keith Busch , Javier Gonzalez Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" There are two reasons for changing this: 1. The nvme device currently uses an internal Intel device id. 2. Since commits "nvme: fix write zeroes offset and count" and "nvme: support multiple namespaces" the controller device no longer has the quirks that the Linux kernel think it has. As the quirks are applied based on pci vendor and device id, change them to get rid of the quirks. To keep backward compatibility, add a new 'x-use-intel-id' parameter to the nvme device to force use of the Intel vendor and device id. This is off by default but add a compat property to set this for machines 4.2 and older. Signed-off-by: Klaus Jensen Reviewed-by: Keith Busch Reviewed-by: Maxim Levitsky --- hw/block/nvme.c | 13 +++++++++---- hw/block/nvme.h | 4 +++- hw/core/machine.c | 1 + 3 files changed, 13 insertions(+), 5 deletions(-) diff --git a/hw/block/nvme.c b/hw/block/nvme.c index 3a377bc56734..bdef53a590b0 100644 --- a/hw/block/nvme.c +++ b/hw/block/nvme.c @@ -2467,8 +2467,15 @@ static void nvme_init_pci(NvmeCtrl *n, PCIDevice *pci_dev) pci_conf[PCI_INTERRUPT_PIN] = 1; pci_config_set_prog_interface(pci_conf, 0x2); - pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL); - pci_config_set_device_id(pci_conf, 0x5845); + + if (n->params.use_intel_id) { + pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL); + pci_config_set_device_id(pci_conf, 0x5846); + } else { + pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_REDHAT); + pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_REDHAT_NVME); + } + pci_config_set_class(pci_conf, PCI_CLASS_STORAGE_EXPRESS); pcie_endpoint_cap_init(pci_dev, 0x80); @@ -2638,8 +2645,6 @@ static void nvme_class_init(ObjectClass *oc, void *data) pc->realize = nvme_realize; pc->exit = nvme_exit; pc->class_id = PCI_CLASS_STORAGE_EXPRESS; - pc->vendor_id = PCI_VENDOR_ID_INTEL; - pc->device_id = 0x5845; pc->revision = 2; set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); diff --git a/hw/block/nvme.h b/hw/block/nvme.h index c3cef0f024da..6b584f53ed64 100644 --- a/hw/block/nvme.h +++ b/hw/block/nvme.h @@ -12,7 +12,8 @@ DEFINE_PROP_UINT32("num_queues", _state, _props.num_queues, 64), \ DEFINE_PROP_UINT8("aerl", _state, _props.aerl, 3), \ DEFINE_PROP_UINT32("aer_max_queued", _state, _props.aer_max_queued, 64), \ - DEFINE_PROP_UINT8("mdts", _state, _props.mdts, 7) + DEFINE_PROP_UINT8("mdts", _state, _props.mdts, 7), \ + DEFINE_PROP_BOOL("x-use-intel-id", _state, _props.use_intel_id, false) typedef struct NvmeParams { char *serial; @@ -21,6 +22,7 @@ typedef struct NvmeParams { uint8_t aerl; uint32_t aer_max_queued; uint8_t mdts; + bool use_intel_id; } NvmeParams; typedef struct NvmeAsyncEvent { diff --git a/hw/core/machine.c b/hw/core/machine.c index 3e288bfceb7f..984412d98c9d 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -34,6 +34,7 @@ GlobalProperty hw_compat_4_2[] = { { "vhost-blk-device", "seg_max_adjust", "off"}, { "usb-host", "suppress-remote-wake", "off" }, { "usb-redir", "suppress-remote-wake", "off" }, + { "nvme", "x-use-intel-id", "on"}, }; const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2);