Message ID | 20200205171031.22582-13-alex.bennee@linaro.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | gdbstub refactor and SVE support | expand |
On 2/5/20 5:10 PM, Alex Bennée wrote: > - /* with maximum vector length */ > + /* with reasonable vector length */ > env->vfp.zcr_el[1] = cpu_isar_feature(aa64_sve, cpu) ? > - cpu->sve_max_vq - 1 : 0; > + MIN(cpu->sve_max_vq - 1, 3) : 0; > env->vfp.zcr_el[2] = env->vfp.zcr_el[1]; > env->vfp.zcr_el[3] = env->vfp.zcr_el[1]; Let's reorg this to if (cpu_isar_feature(aa64_sve, cpu)) { env->vfp.zcr_el[1] = MIN(cpu->sve_max_vq - 1, 3); env->vfp.zcr_el[2] = cpu->sve_max_vq - 1; env->vfp.zcr_el[3] = cpu->sve_max_vq - 1; } Using the MIN setting on el2 and el3 was wrong, as it meant that we could *not* increase the setting later with PR_SVE_SET_VL, at least not without changes to linux-user... r~
diff --git a/target/arm/cpu.c b/target/arm/cpu.c index f86e71a260d..e5eac981b0a 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -199,9 +199,9 @@ static void arm_cpu_reset(CPUState *s) /* and to the SVE instructions */ env->cp15.cpacr_el1 = deposit64(env->cp15.cpacr_el1, 16, 2, 3); env->cp15.cptr_el[3] |= CPTR_EZ; - /* with maximum vector length */ + /* with reasonable vector length */ env->vfp.zcr_el[1] = cpu_isar_feature(aa64_sve, cpu) ? - cpu->sve_max_vq - 1 : 0; + MIN(cpu->sve_max_vq - 1, 3) : 0; env->vfp.zcr_el[2] = env->vfp.zcr_el[1]; env->vfp.zcr_el[3] = env->vfp.zcr_el[1]; /*