From patchwork Mon Feb 24 23:37:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 11402167 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B7EEF138D for ; Mon, 24 Feb 2020 23:42:03 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8E6AD2084E for ; Mon, 24 Feb 2020 23:42:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=gibson.dropbear.id.au header.i=@gibson.dropbear.id.au header.b="KM+9D4os" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8E6AD2084E Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=gibson.dropbear.id.au Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:46174 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6NMQ-0006ve-OE for patchwork-qemu-devel@patchwork.kernel.org; Mon, 24 Feb 2020 18:42:02 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:47210) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6NIP-0006Vf-8X for qemu-devel@nongnu.org; Mon, 24 Feb 2020 18:37:54 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j6NIN-00088p-VD for qemu-devel@nongnu.org; Mon, 24 Feb 2020 18:37:53 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:43209) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1j6NIN-00084M-Jw; Mon, 24 Feb 2020 18:37:51 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 48RJQ44LF9z9sRt; Tue, 25 Feb 2020 10:37:32 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1582587452; bh=/gYCLL/Jk6TTuPaJCqEEFdhUfEKdZ2BLlTEIKLhOQP8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KM+9D4osvKZ9PLVeJwdJMyToWJJchiXsZHtgHGxqGQD3qyzQGIm6/080bP2wUsS+/ tJKx5+kPzBAK5eUc5auoEOxUdC8w/jiZzs5dicl4qCB7Pp619aG9obD8vIBO8c/bf4 7QPbazSKfcRf/iziAgZvjhCFRRpE/1K9hRB2jOvI= From: David Gibson To: groug@kaod.org, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, clg@kaod.org Subject: [PATCH v6 12/18] target/ppc: Don't store VRMA SLBE persistently Date: Tue, 25 Feb 2020 10:37:18 +1100 Message-Id: <20200224233724.46415-13-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200224233724.46415-1-david@gibson.dropbear.id.au> References: <20200224233724.46415-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, Thomas Huth , Xiao Guangrong , "Michael S. Tsirkin" , aik@ozlabs.ru, farosas@linux.ibm.com, Mark Cave-Ayland , Igor Mammedov , paulus@samba.org, Paolo Bonzini , "Edgar E. Iglesias" , David Gibson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Currently, we construct the SLBE used for VRMA translations when the LPCR is written (which controls some bits in the SLBE), then use it later for translations. This is a bit complex and confusing - simplify it by simply constructing the SLBE directly from the LPCR when we need it. Signed-off-by: David Gibson Reviewed-by: Fabiano Rosas Reviewed-by: Greg Kurz --- target/ppc/cpu.h | 3 --- target/ppc/mmu-hash64.c | 28 ++++++---------------------- 2 files changed, 6 insertions(+), 25 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index f9871b1233..5a55fb02bd 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1044,9 +1044,6 @@ struct CPUPPCState { uint32_t flags; uint64_t insns_flags; uint64_t insns_flags2; -#if defined(TARGET_PPC64) - ppc_slb_t vrma_slb; -#endif int error_code; uint32_t pending_interrupts; diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index ac21c14f68..f8bf92aa2e 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -825,6 +825,7 @@ int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, { CPUState *cs = CPU(cpu); CPUPPCState *env = &cpu->env; + ppc_slb_t vrma_slbe; ppc_slb_t *slb; unsigned apshift; hwaddr ptex; @@ -863,8 +864,8 @@ int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, } } else if (ppc_hash64_use_vrma(env)) { /* Emulated VRMA mode */ - slb = &env->vrma_slb; - if (!slb->sps) { + slb = &vrma_slbe; + if (build_vrma_slbe(cpu, slb) != 0) { /* Invalid VRMA setup, machine check */ cs->exception_index = POWERPC_EXCP_MCHECK; env->error_code = 0; @@ -1012,6 +1013,7 @@ skip_slb_search: hwaddr ppc_hash64_get_phys_page_debug(PowerPCCPU *cpu, target_ulong addr) { CPUPPCState *env = &cpu->env; + ppc_slb_t vrma_slbe; ppc_slb_t *slb; hwaddr ptex, raddr; ppc_hash_pte64_t pte; @@ -1033,8 +1035,8 @@ hwaddr ppc_hash64_get_phys_page_debug(PowerPCCPU *cpu, target_ulong addr) return raddr | env->spr[SPR_HRMOR]; } else if (ppc_hash64_use_vrma(env)) { /* Emulated VRMA mode */ - slb = &env->vrma_slb; - if (!slb->sps) { + slb = &vrma_slbe; + if (build_vrma_slbe(cpu, slb) != 0) { return -1; } } else { @@ -1072,30 +1074,12 @@ void ppc_hash64_tlb_flush_hpte(PowerPCCPU *cpu, target_ulong ptex, cpu->env.tlb_need_flush = TLB_NEED_GLOBAL_FLUSH | TLB_NEED_LOCAL_FLUSH; } -static void ppc_hash64_update_vrma(PowerPCCPU *cpu) -{ - CPUPPCState *env = &cpu->env; - ppc_slb_t *slb = &env->vrma_slb; - - /* Is VRMA enabled ? */ - if (ppc_hash64_use_vrma(env)) { - if (build_vrma_slbe(cpu, slb) == 0) { - return; - } - } - - /* Otherwise, clear it to indicate error */ - slb->esid = slb->vsid = 0; - slb->sps = NULL; -} - void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val) { PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); CPUPPCState *env = &cpu->env; env->spr[SPR_LPCR] = val & pcc->lpcr_mask; - ppc_hash64_update_vrma(cpu); } void helper_store_lpcr(CPUPPCState *env, target_ulong val)