From patchwork Sat Mar 14 08:47:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pan Nengyuan X-Patchwork-Id: 11438263 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8561992C for ; Sat, 14 Mar 2020 08:38:11 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5678C2073C for ; Sat, 14 Mar 2020 08:38:11 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5678C2073C Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:42530 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jD2J8-000249-IB for patchwork-qemu-devel@patchwork.kernel.org; Sat, 14 Mar 2020 04:38:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54540) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jD2HD-0006cy-7D for qemu-devel@nongnu.org; Sat, 14 Mar 2020 04:36:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jD2HC-0004fE-4q for qemu-devel@nongnu.org; Sat, 14 Mar 2020 04:36:11 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:53342 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1jD2HB-0004M0-P3; Sat, 14 Mar 2020 04:36:10 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 125627FA44D9298E9226; Sat, 14 Mar 2020 16:36:03 +0800 (CST) Received: from localhost.huawei.com (10.175.104.216) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.487.0; Sat, 14 Mar 2020 16:35:54 +0800 From: Pan Nengyuan To: Subject: [PATCH v5 3/4] hw/misc/macio: fix incorrect creation of mos6522's subclasses Date: Sat, 14 Mar 2020 16:47:29 +0800 Message-ID: <20200314084730.25876-4-pannengyuan@huawei.com> X-Mailer: git-send-email 2.18.2 In-Reply-To: <20200314084730.25876-1-pannengyuan@huawei.com> References: <20200314084730.25876-1-pannengyuan@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.104.216] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 45.249.212.35 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, zhang.zhanghailiang@huawei.com, Pan Nengyuan , Mark Cave-Ayland , qemu-ppc@nongnu.org, euler.robot@huawei.com, David Gibson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" There are two other places where we create mos6522's subclasses but forgot to realize it. This patch do the realize in these places to fix that. Signed-off-by: Pan Nengyuan --- Cc: Mark Cave-Ayland Cc: David Gibson Cc: qemu-ppc@nongnu.org --- v5: - Also fix incorrect creation of mos6522's subclasses on two other places. Not sure if there is a conversion plan, we still keep sysbus_init_child_obj in init() in this patch as it was. --- hw/misc/macio/cuda.c | 11 +++++++++-- hw/misc/macio/pmu.c | 11 +++++++++-- 2 files changed, 18 insertions(+), 4 deletions(-) diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c index e0cc0aac5d..ee780a8288 100644 --- a/hw/misc/macio/cuda.c +++ b/hw/misc/macio/cuda.c @@ -36,6 +36,7 @@ #include "qemu/cutils.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qapi/error.h" #include "trace.h" /* Bits in B data register: all active low */ @@ -524,11 +525,17 @@ static void cuda_realize(DeviceState *dev, Error **errp) CUDAState *s = CUDA(dev); SysBusDevice *sbd; MOS6522State *ms; - DeviceState *d; + DeviceState *d = DEVICE(&s->mos6522_cuda); struct tm tm; + Error *err = NULL; + + object_property_set_bool(OBJECT(d), true, "realized", &err); + if (err != NULL) { + error_propagate(errp, err); + return; + } /* Pass IRQ from 6522 */ - d = DEVICE(&s->mos6522_cuda); ms = MOS6522(d); sbd = SYS_BUS_DEVICE(s); sysbus_pass_irq(sbd, SYS_BUS_DEVICE(ms)); diff --git a/hw/misc/macio/pmu.c b/hw/misc/macio/pmu.c index b8466a4a3f..ae55992288 100644 --- a/hw/misc/macio/pmu.c +++ b/hw/misc/macio/pmu.c @@ -43,6 +43,7 @@ #include "qemu/cutils.h" #include "qemu/log.h" #include "qemu/module.h" +#include "qapi/error.h" #include "trace.h" @@ -741,11 +742,17 @@ static void pmu_realize(DeviceState *dev, Error **errp) PMUState *s = VIA_PMU(dev); SysBusDevice *sbd; MOS6522State *ms; - DeviceState *d; + DeviceState *d = DEVICE(&s->mos6522_pmu);; struct tm tm; + Error *err = NULL; + + object_property_set_bool(OBJECT(d), true, "realized", &err); + if (err != NULL) { + error_propagate(errp, err); + return; + } /* Pass IRQ from 6522 */ - d = DEVICE(&s->mos6522_pmu); ms = MOS6522(d); sbd = SYS_BUS_DEVICE(s); sysbus_pass_irq(sbd, SYS_BUS_DEVICE(ms));