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[81.231.232.130]) by smtp.gmail.com with ESMTPSA id b16sm3939517lfq.34.2020.04.02.06.46.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Apr 2020 06:46:18 -0700 (PDT) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org Subject: [PATCH v1 5/5] dma/xlnx-zdma: Reorg to fix CUR_DSCR Date: Thu, 2 Apr 2020 15:47:21 +0200 Message-Id: <20200402134721.27863-6-edgar.iglesias@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200402134721.27863-1-edgar.iglesias@gmail.com> References: <20200402134721.27863-1-edgar.iglesias@gmail.com> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::242 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: figlesia@xilinx.com, peter.maydell@linaro.org, sstabellini@kernel.org, edgar.iglesias@xilinx.com, sai.pavan.boddu@xilinx.com, frasse.iglesias@gmail.com, alistair@alistair23.me, richard.henderson@linaro.org, frederic.konrad@adacore.com, qemu-arm@nongnu.org, philmd@redhat.com, luc.michel@greensocs.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: "Edgar E. Iglesias" Reorganize the descriptor handling so that CUR_DSCR always points to the next descriptor to be processed. Signed-off-by: Edgar E. Iglesias Reviewed-by: Alistair Francis Reviewed-by: Francisco Iglesias --- hw/dma/xlnx-zdma.c | 47 ++++++++++++++++++++++------------------------ 1 file changed, 22 insertions(+), 25 deletions(-) diff --git a/hw/dma/xlnx-zdma.c b/hw/dma/xlnx-zdma.c index e856d233f2..1c45367f3c 100644 --- a/hw/dma/xlnx-zdma.c +++ b/hw/dma/xlnx-zdma.c @@ -333,10 +333,28 @@ static void zdma_load_src_descriptor(XlnxZDMA *s) } } +static void zdma_update_descr_addr(XlnxZDMA *s, bool type, + unsigned int basereg) +{ + uint64_t addr, next; + + if (type == DTYPE_LINEAR) { + addr = zdma_get_regaddr64(s, basereg); + next = addr + sizeof(s->dsc_dst); + } else { + addr = zdma_get_regaddr64(s, basereg); + addr += sizeof(s->dsc_dst); + address_space_read(s->dma_as, addr, s->attr, (void *) &next, 8); + } + + zdma_put_regaddr64(s, basereg, next); +} + static void zdma_load_dst_descriptor(XlnxZDMA *s) { uint64_t dst_addr; unsigned int ptype = ARRAY_FIELD_EX32(s->regs, ZDMA_CH_CTRL0, POINT_TYPE); + bool dst_type; if (ptype == PT_REG) { memcpy(&s->dsc_dst, &s->regs[R_ZDMA_CH_DST_DSCR_WORD0], @@ -349,24 +367,10 @@ static void zdma_load_dst_descriptor(XlnxZDMA *s) if (!zdma_load_descriptor(s, dst_addr, &s->dsc_dst)) { ARRAY_FIELD_DP32(s->regs, ZDMA_CH_ISR, AXI_RD_DST_DSCR, true); } -} - -static uint64_t zdma_update_descr_addr(XlnxZDMA *s, bool type, - unsigned int basereg) -{ - uint64_t addr, next; - if (type == DTYPE_LINEAR) { - next = zdma_get_regaddr64(s, basereg); - next += sizeof(s->dsc_dst); - zdma_put_regaddr64(s, basereg, next); - } else { - addr = zdma_get_regaddr64(s, basereg); - addr += sizeof(s->dsc_dst); - address_space_read(s->dma_as, addr, s->attr, &next, 8); - zdma_put_regaddr64(s, basereg, next); - } - return next; + /* Advance the descriptor pointer. */ + dst_type = FIELD_EX32(s->dsc_dst.words[3], ZDMA_CH_DST_DSCR_WORD3, TYPE); + zdma_update_descr_addr(s, dst_type, R_ZDMA_CH_DST_CUR_DSCR_LSB); } static void zdma_write_dst(XlnxZDMA *s, uint8_t *buf, uint32_t len) @@ -387,14 +391,7 @@ static void zdma_write_dst(XlnxZDMA *s, uint8_t *buf, uint32_t len) dst_size = FIELD_EX32(s->dsc_dst.words[2], ZDMA_CH_DST_DSCR_WORD2, SIZE); if (dst_size == 0 && ptype == PT_MEM) { - uint64_t next; - bool dst_type = FIELD_EX32(s->dsc_dst.words[3], - ZDMA_CH_DST_DSCR_WORD3, - TYPE); - - next = zdma_update_descr_addr(s, dst_type, - R_ZDMA_CH_DST_CUR_DSCR_LSB); - zdma_load_descriptor(s, next, &s->dsc_dst); + zdma_load_dst_descriptor(s); dst_size = FIELD_EX32(s->dsc_dst.words[2], ZDMA_CH_DST_DSCR_WORD2, SIZE); }