From patchwork Sat Apr 11 04:14:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yifei Jiang X-Patchwork-Id: 11483933 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 912A3913 for ; Sat, 11 Apr 2020 04:17:34 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 70F382078E for ; Sat, 11 Apr 2020 04:17:34 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 70F382078E Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:48550 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jN7aH-00023o-JJ for patchwork-qemu-devel@patchwork.kernel.org; Sat, 11 Apr 2020 00:17:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47218) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jN7Zf-0000Pg-51 for qemu-devel@nongnu.org; Sat, 11 Apr 2020 00:16:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jN7ZU-0006ME-0a for qemu-devel@nongnu.org; Sat, 11 Apr 2020 00:16:54 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:3741 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1jN7ZT-0006L6-MO; Sat, 11 Apr 2020 00:16:43 -0400 Received: from DGGEMS408-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 684BDB5DED9E6ACACEC5; Sat, 11 Apr 2020 12:16:40 +0800 (CST) Received: from huawei.com (10.173.222.107) by DGGEMS408-HUB.china.huawei.com (10.3.19.208) with Microsoft SMTP Server id 14.3.487.0; Sat, 11 Apr 2020 12:16:34 +0800 From: Yifei Jiang To: , Subject: [PATCH RFC v2 3/9] target/riscv: Implement function kvm_arch_init_vcpu Date: Sat, 11 Apr 2020 12:14:21 +0800 Message-ID: <20200411041427.14828-4-jiangyifei@huawei.com> X-Mailer: git-send-email 2.14.1.windows.1 In-Reply-To: <20200411041427.14828-1-jiangyifei@huawei.com> References: <20200411041427.14828-1-jiangyifei@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.173.222.107] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 45.249.212.191 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: victor.zhangxiaofeng@huawei.com, zhang.zhanghailiang@huawei.com, sagark@eecs.berkeley.edu, yinyipeng1@huawei.com, kbastian@mail.uni-paderborn.de, anup.patel@wdc.com, Alistair.Francis@wdc.com, kvm-riscv@lists.infradead.org, palmer@dabbelt.com, Yifei Jiang , dengkai1@huawei.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Get isa info from kvm while kvm init. Signed-off-by: Yifei Jiang Signed-off-by: Yipeng Yin --- target/riscv/kvm.c | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c index 8c386d9acf..3e8f8e7185 100644 --- a/target/riscv/kvm.c +++ b/target/riscv/kvm.c @@ -38,6 +38,18 @@ #include "qemu/log.h" #include "hw/loader.h" +static __u64 kvm_riscv_reg_id(__u64 type, __u64 idx) +{ + __u64 id = KVM_REG_RISCV | type | idx; + +#if defined(TARGET_RISCV32) + id |= KVM_REG_SIZE_U32; +#elif defined(TARGET_RISCV64) + id |= KVM_REG_SIZE_U64; +#endif + return id; +} + const KVMCapabilityInfo kvm_arch_required_capabilities[] = { KVM_CAP_LAST_INFO }; @@ -79,7 +91,19 @@ void kvm_arch_init_irq_routing(KVMState *s) int kvm_arch_init_vcpu(CPUState *cs) { - return 0; + int ret = 0; + uint64_t isa; + RISCVCPU *cpu = RISCV_CPU(cs); + __u64 id; + + id = kvm_riscv_reg_id(KVM_REG_RISCV_CONFIG, KVM_REG_RISCV_CONFIG_REG(isa)); + ret = kvm_get_one_reg(cs, id, &isa); + if (ret) { + return ret; + } + cpu->env.misa = isa; + + return ret; } int kvm_arch_msi_data_to_gsi(uint32_t data)