From patchwork Wed Apr 15 10:24:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Klaus Jensen X-Patchwork-Id: 11490959 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4BB626CA for ; Wed, 15 Apr 2020 10:32:49 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DA900206D9 for ; Wed, 15 Apr 2020 10:32:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org DA900206D9 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=irrelevant.dk Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:47396 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jOfLb-0007CP-ND for patchwork-qemu-devel@patchwork.kernel.org; Wed, 15 Apr 2020 06:32:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43054) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jOfE8-0003Ya-NR for qemu-devel@nongnu.org; Wed, 15 Apr 2020 06:25:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jOfE7-000507-Jh for qemu-devel@nongnu.org; Wed, 15 Apr 2020 06:25:04 -0400 Received: from charlie.dont.surf ([128.199.63.193]:48182) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1jOfE4-0004vp-LG; Wed, 15 Apr 2020 06:25:00 -0400 Received: from apples.local (80-167-98-190-cable.dk.customer.tdc.net [80.167.98.190]) by charlie.dont.surf (Postfix) with ESMTPSA id 87540BF7AF; Wed, 15 Apr 2020 10:24:59 +0000 (UTC) From: Klaus Jensen To: qemu-block@nongnu.org Subject: [PATCH 10/16] nvme: factor out device state setup Date: Wed, 15 Apr 2020 12:24:39 +0200 Message-Id: <20200415102445.564803-11-its@irrelevant.dk> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200415102445.564803-1-its@irrelevant.dk> References: <20200415102445.564803-1-its@irrelevant.dk> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 128.199.63.193 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , Beata Michalska , Klaus Jensen , qemu-devel@nongnu.org, Max Reitz , Klaus Jensen , Keith Busch , Javier Gonzalez , Maxim Levitsky , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: Klaus Jensen Signed-off-by: Klaus Jensen Reviewed-by: Philippe Mathieu-Daudé --- hw/block/nvme.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/hw/block/nvme.c b/hw/block/nvme.c index 635292d6fac4..e67f578fbf79 100644 --- a/hw/block/nvme.c +++ b/hw/block/nvme.c @@ -1339,6 +1339,15 @@ static int nvme_check_constraints(NvmeCtrl *n, Error **errp) return 0; } +static void nvme_init_state(NvmeCtrl *n) +{ + n->num_namespaces = 1; + n->reg_size = pow2ceil(0x1008 + 2 * (n->params.max_ioqpairs) * 4); + n->namespaces = g_new0(NvmeNamespace, n->num_namespaces); + n->sq = g_new0(NvmeSQueue *, n->params.max_ioqpairs + 1); + n->cq = g_new0(NvmeCQueue *, n->params.max_ioqpairs + 1); +} + static void nvme_realize(PCIDevice *pci_dev, Error **errp) { NvmeCtrl *n = NVME(pci_dev); @@ -1352,6 +1361,8 @@ static void nvme_realize(PCIDevice *pci_dev, Error **errp) return; } + nvme_init_state(n); + bs_size = blk_getlength(n->conf.blk); if (bs_size < 0) { error_setg(errp, "could not get backing file size"); @@ -1370,14 +1381,8 @@ static void nvme_realize(PCIDevice *pci_dev, Error **errp) pci_config_set_class(pci_dev->config, PCI_CLASS_STORAGE_EXPRESS); pcie_endpoint_cap_init(pci_dev, 0x80); - n->num_namespaces = 1; - n->reg_size = pow2ceil(0x1008 + 2 * (n->params.max_ioqpairs) * 4); n->ns_size = bs_size / (uint64_t)n->num_namespaces; - n->namespaces = g_new0(NvmeNamespace, n->num_namespaces); - n->sq = g_new0(NvmeSQueue *, n->params.max_ioqpairs + 1); - n->cq = g_new0(NvmeCQueue *, n->params.max_ioqpairs + 1); - memory_region_init_io(&n->iomem, OBJECT(n), &nvme_mmio_ops, n, "nvme", n->reg_size); pci_register_bar(pci_dev, 0,